[coreboot-gerrit] Change in coreboot[master]: soc/amd/common/fsp/pci: Add size field to PCIe interrupt routing HOB

[Raul Rangel (Code Review)]

Attention is currently required from: Marshall Dawson, Nikolai Vyssotski, Matt Papageorge, Felix Held.
Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55237 )

Change subject: soc/amd/common/fsp/pci: Add size field to PCIe interrupt routing HOB
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Patch Set 3:

(3 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/55237/comment/b483784d_ea8eddd8 
PS3, Line 18: Change
Add a Cq-depend: chrome-internal:3889619

File src/soc/amd/common/block/include/amdblocks/amd_pci_util.h:

https://review.coreboot.org/c/coreboot/+/55237/comment/da92f478_4e3b8708 
PS3, Line 55: struct pci_routing_info_hob {
            : 	uint32_t num_of_entries;
            : 	struct pci_routing_info routing_table[];
            : } __packed;
            : 
Can you move this struct into pci_routing_info.c. It's an implementation detail of FSP.

File src/soc/amd/common/fsp/pci/pci_routing_info.c:

https://review.coreboot.org/c/coreboot/+/55237/comment/9c9b6746_ecab754f 
PS3, Line 33: d
u?