Yu-Ping Wu has submitted this change. ( https://review.coreboot.org/c/coreboot/+/85035?usp=email )
(
1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: soc/mediatek/common: Increase DEV_MEM memory range to 16GB ......................................................................
soc/mediatek/common: Increase DEV_MEM memory range to 16GB
Map a proper DRAM range for memory test during calibration.
TEST=memory test passed on Rauru BUG=b:317009620
Signed-off-by: Jarried Lin jarried.lin@mediatek.corp-partner.google.com Change-Id: I06f31ef14715897ba889076d78b8c2d015dd08ef Reviewed-on: https://review.coreboot.org/c/coreboot/+/85035 Reviewed-by: Yidi Lin yidilin@google.com Reviewed-by: Yu-Ping Wu yupingso@google.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/soc/mediatek/common/mmu_operations.c 1 file changed, 2 insertions(+), 2 deletions(-)
Approvals: Yidi Lin: Looks good to me, approved Yu-Ping Wu: Looks good to me, approved build bot (Jenkins): Verified
diff --git a/src/soc/mediatek/common/mmu_operations.c b/src/soc/mediatek/common/mmu_operations.c index cbd6c09..be216f6 100644 --- a/src/soc/mediatek/common/mmu_operations.c +++ b/src/soc/mediatek/common/mmu_operations.c @@ -19,11 +19,11 @@ mmu_init();
/* - * Set 0x0 to 8GB address as device memory. We want to config IO_PHYS + * Set 0x0 to 16GB address as device memory. We want to config IO_PHYS * address to DEV_MEM, and map a proper range of dram for the memory * test during calibration. */ - mmu_config_range((void *)0, (uintptr_t)8U * GiB, DEV_MEM); + mmu_config_range((void *)0, (uintptr_t)16U * GiB, DEV_MEM);
/* SRAM is cached */ mmu_config_range(_sram, REGION_SIZE(sram), SECURE_CACHED_MEM);