Christian Walter has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46456 )
Change subject: soc/intel/cbnt: Stitch in ACMs in the coreboot image
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Patch Set 11: Code-Review+2
(1 comment)
https://review.coreboot.org/c/coreboot/+/46456/11/src/security/intel/txt/Kco...
File src/security/intel/txt/Kconfig:
https://review.coreboot.org/c/coreboot/+/46456/11/src/security/intel/txt/Kco...
PS11, Line 55: default 0x40000 if INTEL_CBNT_SUPPORT
Is this a CBnT-specific constraint, or is this needed because it is Xeon-SP?
CBnT specific.
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