[coreboot-gerrit] Change in ...coreboot[master]: src/soc/intel/cannonlake: Fix PMC and GPIO block values for PCH-H

[Jeremy Soller (Code Review)]

Jeremy Soller has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33941

Change subject: src/soc/intel/cannonlake: Fix PMC and GPIO block values for PCH-H
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src/soc/intel/cannonlake: Fix PMC and GPIO block values for PCH-H

In order for GPEs to work properly, a number of the values used for GPIO_CFG
and MISCCFG were not correct. This adjusts them in order to have GPE_EN set
correctly, and thus enable GPEs, on the following GPIO blocks of PCH-H:

GPP_E
GPP_F
GPP_H
GPP_I
GPP_J
GPP_K
GPD

Signed-off-by: Jeremy Soller

Change-Id: I4ecc9552468037598ef5d4e10122d660dcbfe71d
---
M src/soc/intel/cannonlake/include/soc/gpio_soc_defs_cnp_h.h
M src/soc/intel/cannonlake/include/soc/pmc.h
2 files changed, 14 insertions(+), 14 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/41/33941/1

diff --git a/src/soc/intel/cannonlake/include/soc/gpio_soc_defs_cnp_h.h b/src/soc/intel/cannonlake/include/soc/gpio_soc_defs_cnp_h.h
index 5176ac7..16dd520 100644
--- a/src/soc/intel/cannonlake/include/soc/gpio_soc_defs_cnp_h.h
+++ b/src/soc/intel/cannonlake/include/soc/gpio_soc_defs_cnp_h.h
@@ -26,14 +26,14 @@
 #define GPP_B			1
 #define GPP_C			2
 #define GPP_D			3
+#define GPP_E			6
+#define GPP_F			7
 #define GPP_G			4
-#define GPP_K			5
-#define GPP_H			6
-#define GPP_E			7
-#define GPP_F			8
-#define GPP_I			9
-#define GPP_J			0xA
-#define GPD			0xC
+#define GPP_H			8
+#define GPP_I			0xA
+#define GPP_J			0xB
+#define GPP_K			9
+#define GPD			5
 #define GPIO_NUM_GROUPS		12
 #define GPIO_MAX_NUM_PER_GROUP	24

diff --git a/src/soc/intel/cannonlake/include/soc/pmc.h b/src/soc/intel/cannonlake/include/soc/pmc.h
index 67854d4..f990f6b 100644
--- a/src/soc/intel/cannonlake/include/soc/pmc.h
+++ b/src/soc/intel/cannonlake/include/soc/pmc.h
@@ -121,14 +121,14 @@
 #define PMC_GPP_B			0x1
 #define PMC_GPP_C			0x2
 #define PMC_GPP_D			0x3
-#define PMC_GPP_E			0x7
-#define PMC_GPP_F			0x8
+#define PMC_GPP_E			0xA
+#define PMC_GPP_F			0xB
 #define PMC_GPP_G			0x4
-#define PMC_GPP_H			0x6
-#define PMC_GPP_I			0x9
-#define PMC_GPP_J			0xA
-#define PMC_GPP_K			0x5
-#define PMC_GPD				0xC
+#define PMC_GPP_H			0x9
+#define PMC_GPP_I			0xC
+#define PMC_GPP_J			0xD
+#define PMC_GPP_K			0x8
+#define PMC_GPD				0x7
 #else
 #define  PMC_GPP_A			0x0
 #define  PMC_GPP_B			0x1