Julius Werner has submitted this change. ( https://review.coreboot.org/c/coreboot/+/40874 )
Change subject: sc7180: Increase SPI flash frequency to 37.5MHz ......................................................................
sc7180: Increase SPI flash frequency to 37.5MHz
It seems that all SC7180 boards we have can well handle 37.5MHz of SPI flash speed, so bump that up from the current 25MHz so that we don't leave boot speed on the table. (The next step would be 50MHz which currently doesn't work on all boards so we're not going there yet.)
BUG=b:117440651
Signed-off-by: Julius Werner jwerner@chromium.org Change-Id: Id6e98fcbc89f5f3bfa408c7e8bbc90b4c92ceeea Reviewed-on: https://review.coreboot.org/c/coreboot/+/40874 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Philip Chen philipchen@google.com --- M src/soc/qualcomm/sc7180/bootblock.c 1 file changed, 1 insertion(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Philip Chen: Looks good to me, approved
diff --git a/src/soc/qualcomm/sc7180/bootblock.c b/src/soc/qualcomm/sc7180/bootblock.c index 9cecb4f..d860c4a 100644 --- a/src/soc/qualcomm/sc7180/bootblock.c +++ b/src/soc/qualcomm/sc7180/bootblock.c @@ -22,6 +22,6 @@ { sc7180_mmu_init(); clock_init(); - quadspi_init(25 * MHz); + quadspi_init(37500 * KHz); qupv3_fw_init(); }