Attention is currently required from: Furquan Shaikh, Martin Roth, Karthik Ramasubramanian. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52115 )
Change subject: mb/google/guybrush: PCIe GPIOs - enable enables, disable resets ......................................................................
Patch Set 2: Code-Review+2
(2 comments)
Patchset:
PS2: I've tested this patch and I see both NVMe and WiFi working. I'm fine landing it for now so we can unblock peripheral testing.
File src/mainboard/google/guybrush/variants/baseboard/gpio.c:
https://review.coreboot.org/c/coreboot/+/52115/comment/77995b84_70190b37 PS1, Line 54: HIGH
Reasoning for my comment: Violating timings for PCIe can result in downstream device not being enume […]
Just for my own knowledge, what's the correct way to handle these timings constraints? The i2c ACPI driver allows specifying the GPIOs and delays as part of the device tree. Is there a similar device tree PCI driver that will handle toggling the pins?