Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30822 )
Change subject: sb/intel/i82801gx: Detect if the southbridge supports AHCI ......................................................................
Patch Set 9:
(10 comments)
i don't see a reason why AHCI should be disabled on ICHs that support AHCI; just want the confirmation that the changes are intended and probably won't make a difference
https://review.coreboot.org/#/c/30822/9/src/mainboard/asus/p5gc-mx/devicetre... File src/mainboard/asus/p5gc-mx/devicetree.cb:
https://review.coreboot.org/#/c/30822/9/src/mainboard/asus/p5gc-mx/devicetre... PS9, Line 56: does the ICH on this board support AHCI?
https://review.coreboot.org/#/c/30822/9/src/mainboard/foxconn/g41s-k/devicet... File src/mainboard/foxconn/g41s-k/devicetree.cb:
https://review.coreboot.org/#/c/30822/9/src/mainboard/foxconn/g41s-k/devicet... PS9, Line 50: does this change behavior?
https://review.coreboot.org/#/c/30822/9/src/mainboard/getac/p470/devicetree.... File src/mainboard/getac/p470/devicetree.cb:
https://review.coreboot.org/#/c/30822/9/src/mainboard/getac/p470/devicetree.... PS9, Line 60: same question here
https://review.coreboot.org/#/c/30822/9/src/mainboard/gigabyte/ga-945gcm-s2l... File src/mainboard/gigabyte/ga-945gcm-s2l/devicetree.cb:
https://review.coreboot.org/#/c/30822/9/src/mainboard/gigabyte/ga-945gcm-s2l... PS9, Line 79: same question here
https://review.coreboot.org/#/c/30822/9/src/mainboard/gigabyte/ga-g41m-es2l/... File src/mainboard/gigabyte/ga-g41m-es2l/devicetree.cb:
https://review.coreboot.org/#/c/30822/9/src/mainboard/gigabyte/ga-g41m-es2l/... PS9, Line 51: same question here
https://review.coreboot.org/#/c/30822/9/src/mainboard/intel/d945gclf/devicet... File src/mainboard/intel/d945gclf/devicetree.cb:
https://review.coreboot.org/#/c/30822/9/src/mainboard/intel/d945gclf/devicet... PS9, Line 53: same question here
https://review.coreboot.org/#/c/30822/9/src/mainboard/kontron/986lcd-m/devic... File src/mainboard/kontron/986lcd-m/devicetree.cb:
https://review.coreboot.org/#/c/30822/9/src/mainboard/kontron/986lcd-m/devic... PS9, Line 39: same question here
https://review.coreboot.org/#/c/30822/9/src/mainboard/roda/rk886ex/devicetre... File src/mainboard/roda/rk886ex/devicetree.cb:
https://review.coreboot.org/#/c/30822/9/src/mainboard/roda/rk886ex/devicetre... PS9, Line 64: same question here
https://review.coreboot.org/#/c/30822/9/src/southbridge/intel/i82801gx/sata.... File src/southbridge/intel/i82801gx/sata.c:
https://review.coreboot.org/#/c/30822/9/src/southbridge/intel/i82801gx/sata.... PS9, Line 58: likely to be able to use additional functions of a pci device, function 0 has to be enabled
https://review.coreboot.org/#/c/30822/9/src/southbridge/intel/i82801gx/sata.... PS9, Line 63: return; is it correct that pci_write_config8(dev, SATA_MAP, pci_read_config8(dev, SATA_MAP) & ~0xc3) doesn't get run in this case? this is at least a difference to the previous the code flow.