Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44706 )
Change subject: soc/mediatek/mt8192: Do dramc pre-settings before calibration ......................................................................
Patch Set 44:
(5 comments)
https://review.coreboot.org/c/coreboot/+/44706/44/src/soc/mediatek/mt8192/dr... File src/soc/mediatek/mt8192/dramc_pi_basic_api.c:
https://review.coreboot.org/c/coreboot/+/44706/44/src/soc/mediatek/mt8192/dr... PS44, Line 116: case 0: : write_latency = 4; : break; : case 1: : write_latency = 6; : break; : case 2: : write_latency = 8; : break; : case 3: : write_latency = 10; : break; : case 4: : write_latency = 12; : break; : case 5: : write_latency = 14; : break; : case 6: : write_latency = 16; : break; : case 7: : write_latency = 18; : break; Is the following the right logic?
write_latency = mr_wl * 2 + 4;
https://review.coreboot.org/c/coreboot/+/44706/44/src/soc/mediatek/mt8192/dr... PS44, Line 157: small_ui_to_large Can we name it 'shift'?
https://review.coreboot.org/c/coreboot/+/44706/44/src/soc/mediatek/mt8192/dr... PS44, Line 167: ( No parentheses.
https://review.coreboot.org/c/coreboot/+/44706/44/src/soc/mediatek/mt8192/dr... PS44, Line 170: ( No parentheses.
https://review.coreboot.org/c/coreboot/+/44706/44/src/soc/mediatek/mt8192/em... File src/soc/mediatek/mt8192/emi.c:
https://review.coreboot.org/c/coreboot/+/44706/44/src/soc/mediatek/mt8192/em... PS44, Line 323: ma_type = (ma_type_r0 > ma_type_r1) ? ma_type_r1 : ma_type_r0; : : return ma_type; return MIN(ma_type_r0, ma_type_r1)