Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39824 )
Change subject: soc/intel/jasperlake: Remove Tiger Lake SoC code from Jasper Lake ......................................................................
Patch Set 2:
(5 comments)
https://review.coreboot.org/c/coreboot/+/39824/2/src/soc/intel/jasperlake/bo... File src/soc/intel/jasperlake/bootblock/pch.c:
https://review.coreboot.org/c/coreboot/+/39824/2/src/soc/intel/jasperlake/bo... PS2, Line 121: pmc_base_reg = get_pmc_reg_base(); nit: This could have been changed to PCR_PSF3_TO_SHDW_PMC_REG_BASE so that code changes are minimal.
https://review.coreboot.org/c/coreboot/+/39824/2/src/soc/intel/jasperlake/bo... File src/soc/intel/jasperlake/bootblock/report_platform.c:
https://review.coreboot.org/c/coreboot/+/39824/2/src/soc/intel/jasperlake/bo... PS2, Line 52: Jasperlake Elkhartlake Why was this removed?
https://review.coreboot.org/c/coreboot/+/39824/2/src/soc/intel/jasperlake/in... File src/soc/intel/jasperlake/include/soc/gpio_soc_defs.h:
https://review.coreboot.org/c/coreboot/+/39824/2/src/soc/intel/jasperlake/in... PS2, Line 15: _SOC_JASPERLAKE_GPIO_SOC_DEFS_JSL_H_ _SOC_JASPERLAKE_GPIO_SOC_DEFS_H_
https://review.coreboot.org/c/coreboot/+/39824/2/src/soc/intel/jasperlake/in... File src/soc/intel/jasperlake/include/soc/pch.h:
https://review.coreboot.org/c/coreboot/+/39824/2/src/soc/intel/jasperlake/in... PS2, Line 20: #define PCH_UNKNOWN_SERIES 0xFF Isn't this unused now?
https://review.coreboot.org/c/coreboot/+/39824/2/src/soc/intel/jasperlake/ro... File src/soc/intel/jasperlake/romstage/fsp_params.c:
https://review.coreboot.org/c/coreboot/+/39824/2/src/soc/intel/jasperlake/ro... PS2, Line 92: _ This is actually _COPY_ version still.