[coreboot-gerrit] Change in coreboot[master]: [WIP]security/intel: Add option to eanble SMM flash access only

[Benjamin Doron (Code Review)]

Benjamin Doron has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40830 )

Change subject: [WIP]security/intel: Add option to eanble SMM flash access only
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Patch Set 1:

(1 comment)

https://review.coreboot.org/c/coreboot/+/40830/1/src/soc/intel/common/pch/lo... 
File src/soc/intel/common/pch/lockdown/lockdown.c:

https://review.coreboot.org/c/coreboot/+/40830/1/src/soc/intel/common/pch/lo... 
PS1, Line 94: soc_lockdown_config
> Skylake follows the same procedure (_set_bios_interface_lock_down, _set_lock_enable) on the LPC in ` […]

No, it appears that configuration of the LPC there is to lock it. BIOS accesses go to SPI on my board (likely on most, if not all, boards).