[coreboot-gerrit] [XS] Change in coreboot[main]: mb/novacustom/mtl-h/romstage.c: Set Loadline FSP UPDs

[Matt DeVillier (Code Review)]

Matt DeVillier has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86787?usp=email )

Change subject: mb/novacustom/mtl-h/romstage.c: Set Loadline FSP UPDs
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mb/novacustom/mtl-h/romstage.c: Set Loadline FSP UPDs

Set AC / DC Load Line params. The values were dumped from original Clevo
Insyde UEFI firmware, version 1.07.02

Change-Id: I4cf729fc55ed6f2722606f393b6aa45afe396a6e
Signed-off-by: Michał Kopeć 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/86787
Reviewed-by: Michał Żygowski 
Tested-by: build bot (Jenkins) 
---
M src/mainboard/novacustom/mtl-h/romstage.c
1 file changed, 7 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Michał Żygowski: Looks good to me, approved

diff --git a/src/mainboard/novacustom/mtl-h/romstage.c b/src/mainboard/novacustom/mtl-h/romstage.c
index 8fdd9ec..3eb1dca 100644
--- a/src/mainboard/novacustom/mtl-h/romstage.c
+++ b/src/mainboard/novacustom/mtl-h/romstage.c
@@ -27,5 +27,12 @@
    	},
    };

+	mupd->FspmConfig.AcLoadline[0] = 190;
+	mupd->FspmConfig.AcLoadline[1] = 310;
+	mupd->FspmConfig.AcLoadline[2] = 490;
+	mupd->FspmConfig.DcLoadline[0] = 190;
+	mupd->FspmConfig.DcLoadline[1] = 310;
+	mupd->FspmConfig.DcLoadline[2] = 490;
+
    memcfg_init(mupd, &mem_config, &dimm_module_spd_info, half_populated);
 }