Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/47621 )
Change subject: nb/intel/sandybridge: Remove spurious writes to IOSAV BW mask ......................................................................
nb/intel/sandybridge: Remove spurious writes to IOSAV BW mask
The byte-wise error mask only needs to be set for certain corner cases in read MPR training. Thus, minimize writes to this register.
Tested on Asus P8H61-M PRO, still boots.
Change-Id: I0bb8d99ad60c4964f896d303878e5982ae1dcdbe Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/northbridge/intel/sandybridge/raminit_common.c 1 file changed, 4 insertions(+), 23 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/47621/1
diff --git a/src/northbridge/intel/sandybridge/raminit_common.c b/src/northbridge/intel/sandybridge/raminit_common.c index e93ce0a..886177d 100644 --- a/src/northbridge/intel/sandybridge/raminit_common.c +++ b/src/northbridge/intel/sandybridge/raminit_common.c @@ -1423,9 +1423,7 @@ FOR_ALL_POPULATED_CHANNELS { program_timings(ctrl, channel); } - FOR_ALL_POPULATED_CHANNELS FOR_ALL_LANES { - MCHBAR32(IOSAV_By_BW_MASK_ch(channel, lane)) = 0; - } + return 0; }
@@ -1978,7 +1976,7 @@
int write_training(ramctr_timing *ctrl) { - int channel, slotrank, lane; + int channel, slotrank; int err;
FOR_ALL_POPULATED_CHANNELS @@ -1992,10 +1990,6 @@
printram("CPF\n");
- FOR_ALL_POPULATED_CHANNELS FOR_ALL_LANES { - MCHBAR32(IOSAV_By_BW_MASK_ch(channel, lane)) = 0; - } - FOR_ALL_POPULATED_CHANNELS { fill_pattern0(ctrl, channel, 0xaaaaaaaa, 0x55555555); } @@ -2015,9 +2009,6 @@ FOR_ALL_POPULATED_CHANNELS program_timings(ctrl, channel);
- FOR_ALL_POPULATED_CHANNELS FOR_ALL_LANES { - MCHBAR32(IOSAV_By_BW_MASK_ch(channel, lane)) = 0; - } return 0; }
@@ -2294,6 +2285,7 @@
fill_pattern0(ctrl, channel, 0, 0); FOR_ALL_LANES { + MCHBAR32(IOSAV_By_BW_MASK_ch(channel, lane)) = 0; MCHBAR32(IOSAV_By_BW_SERROR_C_ch(channel, lane)); }
@@ -2357,10 +2349,6 @@ toggle_io_reset();
FOR_ALL_POPULATED_CHANNELS { - FOR_ALL_LANES { - MCHBAR32(IOSAV_By_BW_MASK_ch(channel, lane)) = 0; - } - find_predefined_pattern(ctrl, channel);
fill_pattern0(ctrl, channel, 0, 0xffffffff); @@ -2539,9 +2527,6 @@ FOR_ALL_POPULATED_CHANNELS program_timings(ctrl, channel);
- FOR_ALL_POPULATED_CHANNELS FOR_ALL_LANES { - MCHBAR32(IOSAV_By_BW_MASK_ch(channel, lane)) = 0; - } return 0; }
@@ -3048,7 +3033,7 @@
void restore_timings(ramctr_timing *ctrl) { - int channel, lane; + int channel;
FOR_ALL_POPULATED_CHANNELS { const union tc_rap_reg tc_rap = { @@ -3069,10 +3054,6 @@ wait_for_iosav(channel); }
- FOR_ALL_POPULATED_CHANNELS FOR_ALL_LANES { - MCHBAR32(IOSAV_By_BW_MASK_ch(channel, lane)) = 0; - } - FOR_ALL_POPULATED_CHANNELS MCHBAR32_OR(TC_RWP_ch(channel), 1 << 27);