[coreboot-gerrit] Change in coreboot[master]: soc/intel/braswell: Disable the HPET

[Frans Hendriks (Code Review)]

Frans Hendriks has uploaded this change for review. ( https://review.coreboot.org/29655

Change subject: soc/intel/braswell: Disable the HPET
......................................................................

soc/intel/braswell: Disable the HPET

The timer interrupts don't appear when HPET is enabled. This
result in Linux reporting 'MP-BIOS bug: 8254 timer not connected
to IO-APIC'
Enabling CONFIG_DISABLE_HPET result into a booting system.

BUG=N/A
TEST=Portwell PQ7-M107

Change-Id: Ie9a78dcc736eb057c040a0a303c812adb1f76f3c
Signed-off-by: Frans Hendriks 
---
M src/soc/intel/braswell/Kconfig
M src/soc/intel/braswell/acpi.c
M src/soc/intel/braswell/acpi/lpc.asl
3 files changed, 13 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/29655/1

diff --git a/src/soc/intel/braswell/Kconfig b/src/soc/intel/braswell/Kconfig
index 50c2802..c383cdf 100644
--- a/src/soc/intel/braswell/Kconfig
+++ b/src/soc/intel/braswell/Kconfig
@@ -128,4 +128,11 @@
    string
    default "soc/intel/braswell/bootblock/timestamp.inc"

+config DISABLE_HPET
+	bool "Disable the HPET device"
+	default n
+	help
+	 Enable this to disable the HPET support
+	 Solves the Linux MP-BIOS bug timer not connected.
+
 endif
diff --git a/src/soc/intel/braswell/acpi.c b/src/soc/intel/braswell/acpi.c
index f402f54..aa1cb74 100644
--- a/src/soc/intel/braswell/acpi.c
+++ b/src/soc/intel/braswell/acpi.c
@@ -4,6 +4,7 @@
  * Copyright (C) 2007-2009 coresystems GmbH
  * Copyright (C) 2013 Google Inc.
  * Copyright (C) 2015 Intel Corp.
+ * Copyright (C) 2018 Eltan B.V.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -487,8 +488,10 @@
    acpi_header_t *ssdt2;
    global_nvs_t *gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS);

-	current = acpi_write_hpet(device, current, rsdp);
-	current = acpi_align_current(current);
+	if (!IS_ENABLED(CONFIG_DISABLE_HPET)) {
+		current = acpi_write_hpet(device, current, rsdp);
+		current = acpi_align_current(current);
+	}

if (IS_ENABLED(CONFIG_INTEL_GMA_ADD_VBT)) {
    	igd_opregion_t *opregion;
diff --git a/src/soc/intel/braswell/acpi/lpc.asl b/src/soc/intel/braswell/acpi/lpc.asl
index 0a8b8bc..70486b1 100644
--- a/src/soc/intel/braswell/acpi/lpc.asl
+++ b/src/soc/intel/braswell/acpi/lpc.asl
@@ -3,6 +3,7 @@
  *
  * Copyright (C) 2007-2009 coresystems GmbH
  * Copyright (C) 2013 Google Inc.
+ * Copyright (C) 2018 Eltan B.V.
  *
  * This program is free software; you can redistribute it and/or
  * modify it under the terms of the GNU General Public License as