Sheng-Liang Pan has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46612 )
Change subject: mb/google/volteer/var/voxel: Disable SRCCLKREQ1# ......................................................................
mb/google/volteer/var/voxel: Disable SRCCLKREQ1#
According to the schematic,SRCCLKREQ1# is not connected, so disable it on voxel.
BUG=b:171279034 BRANCH=volteer TEST="emerge-volteer coreboot" compiles successfully.
Signed-off-by: Pan Sheng-Liang sheng-liang.pan@quanta.corp-partner.google.com Change-Id: Ibc4f766bd737f30a9ac3c7354d54398e0c36d59d --- M src/mainboard/google/volteer/variants/voxel/overridetree.cb 1 file changed, 3 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/12/46612/1
diff --git a/src/mainboard/google/volteer/variants/voxel/overridetree.cb b/src/mainboard/google/volteer/variants/voxel/overridetree.cb index d7a265b..e8be8e3 100644 --- a/src/mainboard/google/volteer/variants/voxel/overridetree.cb +++ b/src/mainboard/google/volteer/variants/voxel/overridetree.cb @@ -14,6 +14,9 @@ .tdp_pl4 = 105, }"
+ # Disable SRCCLKREQ1# + register "PcieClkSrcUsage[1]" = "PCIE_CLK_NOTUSED" + device domain 0 on device ref dptf on chip drivers/intel/dptf