Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/libgfxinit/+/35750 )
Change subject: Increase range of our main Frequency_Type ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/libgfxinit/+/35750/2/common/hw-gfx-gma-pch-vga... File common/hw-gfx-gma-pch-vga.adb:
https://review.coreboot.org/c/libgfxinit/+/35750/2/common/hw-gfx-gma-pch-vga... PS2, Line 138: Div_Sel := Word32 (Refclock / Mode.Dotclock) - 2;
Why is this change needed here?
It's the truth I tried to avoid. With `Mode.Dotclock` being possibly nearly as high as `Refclock` (see above), the division could result in 1, that minus 2, gives us -1 which can't be converted to a `Word32`. However the overflow of the subtraction is well defined in the modulo type `Word32`. So the change avoids the undefined behaviour, not the overflow itself.
A more elegant but also much more tedious solution would be to add preconditions all the way back to Update_Outputs() where we could prove that we wouldn't ever have such a high `Mode.Dotclock`. More precisely, in Fill_Port_Config, we'd need 12 FDI lanes to reach `Refclock / 2` :)