[coreboot-gerrit] Change in coreboot[master]: vendorcode/intel/fsp/fsp2_0/CPX-SP: update to ww32 release and adapt soc

[Maxim Polyakov (Code Review)]

Maxim Polyakov has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44257 )

Change subject: vendorcode/intel/fsp/fsp2_0/CPX-SP: update to ww32 release and adapt soc
......................................................................

Patch Set 7: Code-Review+2

(1 comment)

https://review.coreboot.org/c/coreboot/+/44257/6/src/vendorcode/intel/fsp/fs... 
File src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/FspmUpd.h:

https://review.coreboot.org/c/coreboot/+/44257/6/src/vendorcode/intel/fsp/fs... 
PS6, Line 329: /** Offset 0x008D - MBA BW Calibration
             :   MBA BW Calibration setting
             :   0:Linear, 1:Biased, 2:Legacy, 3:Auto
             : **/
             :   UINT8                       MbeBwCal;
> I will create an IPS ticket for this. […]

Ok, thanks.