[coreboot-gerrit] Change in ...coreboot[master]: arch/riscv: Fix arch timer timebase

[Patrick Rudolph (Code Review)]

Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33797 )

Change subject: arch/riscv: Fix arch timer timebase
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Patch Set 1:
> Patch Set 1: Code-Review+1
>
> I guess this is fine as a quick fix. Ideally, the timebase should be runtime detected, think MSRs of the x86 world, but simpler.

I couldn't find a CSR that reflects the clock frequency. It looks like that on fu540 it's an external clock driving mtime counter that board manufacturer should connect to 1MHz.
Do you have additional documentation how to do runtime detection?