Attention is currently required from: Angel Pons, Erik van den Bogaert, Frans Hendriks, Jan Samek, Jeremy Soller, Michael Niewöhner, Michał Żygowski, Nicholas Sudsgaard, Nico Huber, Piotr Król, Sean Rhodes, Tim Crawford.
Jonathon Hall has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79917?usp=email )
Change subject: soc/intel/skylake: Drop redundant PcieRpEnable
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Patch Set 2:
(1 comment)
File src/mainboard/purism/librem_skl/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/79917/comment/7f7ece87_62f2009c :
PS2, Line 141: register "PcieRpEnable[4]" = "1"
I don't know why librem_skl has pcie_rp1 in the device tree, but enables PcieRpEnable[4] here. RP9 is for NVMe, RP5 is for WLAN - both of which worked.
Maybe the device tree had pcie_rp1 because RP5 will get promoted to PCI function 0? Other boards don't do this, was this necessary in older coreboot releases? My guess is that it should change to pcie_rp5, but I will confirm.
I'll test this CL on it and check it out.
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