[coreboot-gerrit] Change in coreboot[master]: soc/intel/tigerlake: Update chip files

[Nick Vaccaro (Code Review)]

Nick Vaccaro has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37783 )

Change subject: soc/intel/tigerlake: Update chip files
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Patch Set 33: Code-Review+2

(1 comment)

https://review.coreboot.org/c/coreboot/+/37783/33//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/c/coreboot/+/37783/33//COMMIT_MSG@12 
PS33, Line 12:  - Update Kconfig : Define CONFIG_MAX_PCIE_CLOCKS for chip.h update
             :   - Update pmc_utils.c and JSL devicetree for build failure
             : 
             :
> Remove Kconfig and pmc_utils.c changes from summary.

Please ignore comment, my geritt config was not comparing against base, so I wasn't seeing those two other files.