[coreboot-gerrit] Change in coreboot[master]: soc/amd/picasso: Add generic SMU service request

[Felix Held (Code Review)]

Hello Marshall Dawson, Marshall Dawson,

I'd like you to do a code review. Please visit

https://review.coreboot.org/c/coreboot/+/41625

to review the following change.

Change subject: soc/amd/picasso: Add generic SMU service request
......................................................................

soc/amd/picasso: Add generic SMU service request

Add a new feature that allows messages to be sent to the SMU.  The
offsets of the PCI config index/data indirect registers have been
documented for prior generation devices.

The index/data pair is used access a command register, a response,
and six argument values.

BUG=b:153264473
TEST=Verify service can be used to take the system into S3

Change-Id: Ide431aa976cb2f8bdc248cb08aa0724a9596ac5a
Signed-off-by: Marshall Dawson 
Reviewed-on: https://chromium-review.googlesource.com/2161796
Reviewed-by: Furquan Shaikh 
---
M src/soc/amd/picasso/Makefile.inc
A src/soc/amd/picasso/include/soc/smu.h
A src/soc/amd/picasso/smu.c
3 files changed, 112 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/41625/1

diff --git a/src/soc/amd/picasso/Makefile.inc b/src/soc/amd/picasso/Makefile.inc
index e1416bc..7ca8d9e 100644
--- a/src/soc/amd/picasso/Makefile.inc
+++ b/src/soc/amd/picasso/Makefile.inc
@@ -72,6 +72,7 @@
 smm-$(CONFIG_DEBUG_SMI) += uart.c
 smm-y += gpio.c
 smm-y += psp.c
+smm-y += smu.c
 smm-y += config.c

CPPFLAGS_common += -I$(src)/soc/amd/picasso
diff --git a/src/soc/amd/picasso/include/soc/smu.h b/src/soc/amd/picasso/include/soc/smu.h
new file mode 100644
index 0000000..2c429b5
--- /dev/null
+++ b/src/soc/amd/picasso/include/soc/smu.h
@@ -0,0 +1,38 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef __PICASSO_SMU_H__
+#define __PICASSO_SMU_H__
+
+/* SMU registers accessed indirectly using an index/data pair in D0F00 */
+#define SMU_INDEX_ADDR		0xb8
+#define SMU_DATA_ADDR		0xbc
+
+#define REG_ADDR_MESG_ID	0x3b10528
+#define REG_ADDR_MESG_RESP	0x3b10564
+#define REG_ADDR_MESG_ARGS_BASE	0x0b10998
+
+/* Argument 0-5 indexed locations are contiguous */
+#define NUM_ARGS		6
+#define REG_ADDR_MESG_ARG(x)	(REG_ADDR_MESG_ARGS_BASE + ((x) * sizeof(uint32_t)))
+
+enum smu_message_id {
+	SMC_MSG_S3ENTRY = 0xc,
+};
+
+struct smu_payload {
+	uint32_t msg[NUM_ARGS];
+};
+
+/*
+ * Send a message and bi-directional payload to the SMU.  SMU response, if
+ * any, is returned via arg.  Returns 0 if success or -1 on failure.
+ */
+int send_smu_message(enum smu_message_id id, struct smu_payload *arg);
+
+/*
+ * Request the SMU put system into S3, S4, or S5.  On entry, SlpTyp determines
+ * S-State and SlpTypeEn is clear.  Function does not return if successful.
+ */
+void smu_sx_entry(void);
+
+#endif /* __PICASSO_SMU_H__ */
diff --git a/src/soc/amd/picasso/smu.c b/src/soc/amd/picasso/smu.c
new file mode 100644
index 0000000..2150f49
--- /dev/null
+++ b/src/soc/amd/picasso/smu.c
@@ -0,0 +1,73 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <timer.h>
+#include <console/console.h>
+#include <device/pci_ops.h>
+#include <soc/pci_devs.h>
+#include <soc/smu.h>
+
+static uint32_t smu_read32(uint32_t reg)
+{
+	pci_write_config32(SOC_GNB_DEV, SMU_INDEX_ADDR, reg);
+	return pci_read_config32(SOC_GNB_DEV, SMU_DATA_ADDR);
+}
+
+static void smu_write32(uint32_t reg, uint32_t val)
+{
+	pci_write_config32(SOC_GNB_DEV, SMU_INDEX_ADDR, reg);
+	pci_write_config32(SOC_GNB_DEV, SMU_DATA_ADDR, val);
+}
+
+static int smu_poll_response(void)
+{
+	struct stopwatch sw;
+	const long timeout_ms = 10 * MSECS_PER_SEC;
+
+	stopwatch_init_msecs_expire(&sw, timeout_ms);
+
+	do {
+		if (!smu_read32(REG_ADDR_MESG_RESP)) {
+			printk(BIOS_SPEW, "SMU command consumed %ld msecs\n",
+					stopwatch_duration_usecs(&sw));
+			return 0;
+		}
+	} while (!stopwatch_expired(&sw));
+
+	printk(BIOS_ERR, "Error: timeout sending SMU message\n");
+	return -1;
+}
+
+/*
+ * Send a message and bi-directional payload to the SMU.  SMU response, if
+ * any, is returned via arg.  Returns 0 if success or -1 on failure.
+ */
+int send_smu_message(enum smu_message_id id, struct smu_payload *arg)
+{
+	int i;
+
+	smu_write32(REG_ADDR_MESG_RESP, 0);
+
+	for (i = 0 ; i < NUM_ARGS ; i++)
+		smu_write32(REG_ADDR_MESG_ARG(i), arg->msg[i]);
+
+	smu_write32(REG_ADDR_MESG_ID, id);
+	if (smu_poll_response())
+		return -1;
+
+	for (i = 0 ; i < NUM_ARGS ; i++)
+		arg->msg[i] = smu_read32(REG_ADDR_MESG_ARG(i));
+
+	return 0;
+}
+
+/*
+ * Request the SMU put system into S3, S4, or S5.  On entry, SlpTyp determines
+ * S-State and SlpTypeEn is clear.  Function does not return if successful.
+ */
+void smu_sx_entry(void)
+{
+	struct smu_payload msg = { 0 }; /* Unused for SMC_MSG_S3ENTRY */
+
+	printk(BIOS_DEBUG, "SMU: Put system into S3/S4/S5\n");
+	send_smu_message(SMC_MSG_S3ENTRY, &msg);
+}