Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/29423 )
Change subject: src/soc/intel/braswell/southcluster.c: Configure IO APIC ......................................................................
Patch Set 3:
Patch Set 3:
(2 comments)
The area need to be reserved to ensure no other use of this area. It might work without this area, but to be ACPI compliant coreboot must claim used areas. In comment of CBFS_SIZE mentioned it defaults span the whole ROM.
"It defaults to span the whole ROM on all but Intel systems that use an Intel Firmware Descriptor." On vboot enabled systems CBFS_SIZE << BIOS_REGION. You need to read the size of the BIOS region from SPIBAR.
The use of IO_APIC is in same style of RCBA (at least for braswell). You mean the RCBAxx() macro style used on some other platforms?
yes, like #define IOAPIC32(x) ...