Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36221 )
Change subject: Add configurable ramstage support for minimal PCI scanning ......................................................................
Patch Set 9:
Patch Set 9:
Patch Set 9:
I was after a solution that involves _not_ modifying the devicetree.cb files at all. You would probe the PCI device ID, bind it to a PCI driver, and have the driver tell you the device is mandatory.
I think I was agreeing with you that we can try your proposed approach :-)
No devicetree.cb changes. No sconfig changes. I'll take a look.
I'll take a run at it in the coming days, time allowing.
The net result (for non-blobbed PCI device init) may be that most on-board/integrated PCI devices end up being marked as mandatory. That's why I am trying to approach the problem from the other end and only leave the problematic large MMIO resources unassigned.
Point taken. OK, we'll do some further work on this and let you know how it goes.
I don't know who 'we' refers to there. Anyways; my opinion should be pretty clear from all the previous comments, I would rather see development efforts put directly into utilising 64-bit MMIO window for the viable (and problematic) large memory resources.