Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/80217?usp=email )
Change subject: soc/amd: rename agesa_write_acpi_tables to soc_acpi_write_tables ......................................................................
soc/amd: rename agesa_write_acpi_tables to soc_acpi_write_tables
It's not the AGESA code that generates most of the ACPI tables, so rename the function. This also aligns the other SoCs more with Genoa.
Signed-off-by: Felix Held felix-coreboot@felixheld.de Change-Id: I6b2e6c4cb7139c8bde01b4440ab2e923a1086827 Reviewed-on: https://review.coreboot.org/c/coreboot/+/80217 Reviewed-by: Matt DeVillier matt.devillier@amd.corp-partner.google.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/soc/amd/cezanne/agesa_acpi.c M src/soc/amd/cezanne/chip.c M src/soc/amd/cezanne/include/soc/acpi.h M src/soc/amd/glinda/agesa_acpi.c M src/soc/amd/glinda/chip.c M src/soc/amd/glinda/include/soc/acpi.h M src/soc/amd/mendocino/agesa_acpi.c M src/soc/amd/mendocino/chip.c M src/soc/amd/mendocino/include/soc/acpi.h M src/soc/amd/phoenix/agesa_acpi.c M src/soc/amd/phoenix/chip.c M src/soc/amd/phoenix/include/soc/acpi.h M src/soc/amd/picasso/agesa_acpi.c M src/soc/amd/picasso/chip.c M src/soc/amd/picasso/include/soc/acpi.h M src/soc/amd/stoneyridge/northbridge.c 16 files changed, 29 insertions(+), 29 deletions(-)
Approvals: build bot (Jenkins): Verified Matt DeVillier: Looks good to me, approved
diff --git a/src/soc/amd/cezanne/agesa_acpi.c b/src/soc/amd/cezanne/agesa_acpi.c index e6ccd9c..5dfc59d 100644 --- a/src/soc/amd/cezanne/agesa_acpi.c +++ b/src/soc/amd/cezanne/agesa_acpi.c @@ -7,8 +7,8 @@ #include <soc/acpi.h> #include <types.h>
-uintptr_t agesa_write_acpi_tables(const struct device *device, uintptr_t current, - acpi_rsdp_t *rsdp) +uintptr_t soc_acpi_write_tables(const struct device *device, uintptr_t current, + acpi_rsdp_t *rsdp) { /* TODO: look into adding CRAT */
diff --git a/src/soc/amd/cezanne/chip.c b/src/soc/amd/cezanne/chip.c index 4723321..1ef8fcc 100644 --- a/src/soc/amd/cezanne/chip.c +++ b/src/soc/amd/cezanne/chip.c @@ -35,7 +35,7 @@
static void soc_init(void *chip_info) { - default_dev_ops_root.write_acpi_tables = agesa_write_acpi_tables; + default_dev_ops_root.write_acpi_tables = soc_acpi_write_tables;
amd_fsp_silicon_init();
diff --git a/src/soc/amd/cezanne/include/soc/acpi.h b/src/soc/amd/cezanne/include/soc/acpi.h index 1a0e2a1..5c8b5d2 100644 --- a/src/soc/amd/cezanne/include/soc/acpi.h +++ b/src/soc/amd/cezanne/include/soc/acpi.h @@ -10,7 +10,7 @@
#define ACPI_SCI_IRQ 9
-uintptr_t agesa_write_acpi_tables(const struct device *device, uintptr_t current, - acpi_rsdp_t *rsdp); +uintptr_t soc_acpi_write_tables(const struct device *device, uintptr_t current, + acpi_rsdp_t *rsdp);
#endif /* AMD_CEZANNE_ACPI_H */ diff --git a/src/soc/amd/glinda/agesa_acpi.c b/src/soc/amd/glinda/agesa_acpi.c index f6c3c98..e55431b 100644 --- a/src/soc/amd/glinda/agesa_acpi.c +++ b/src/soc/amd/glinda/agesa_acpi.c @@ -9,8 +9,8 @@ #include <soc/acpi.h> #include <types.h>
-uintptr_t agesa_write_acpi_tables(const struct device *device, uintptr_t current, - acpi_rsdp_t *rsdp) +uintptr_t soc_acpi_write_tables(const struct device *device, uintptr_t current, + acpi_rsdp_t *rsdp) { /* TODO: look into adding CRAT */
diff --git a/src/soc/amd/glinda/chip.c b/src/soc/amd/glinda/chip.c index 32d3ce5..ff10b62 100644 --- a/src/soc/amd/glinda/chip.c +++ b/src/soc/amd/glinda/chip.c @@ -37,7 +37,7 @@
static void soc_init(void *chip_info) { - default_dev_ops_root.write_acpi_tables = agesa_write_acpi_tables; + default_dev_ops_root.write_acpi_tables = soc_acpi_write_tables;
amd_fsp_silicon_init();
diff --git a/src/soc/amd/glinda/include/soc/acpi.h b/src/soc/amd/glinda/include/soc/acpi.h index 138086e..6f8e06c 100644 --- a/src/soc/amd/glinda/include/soc/acpi.h +++ b/src/soc/amd/glinda/include/soc/acpi.h @@ -12,7 +12,7 @@
#define ACPI_SCI_IRQ 9
-uintptr_t agesa_write_acpi_tables(const struct device *device, uintptr_t current, - acpi_rsdp_t *rsdp); +uintptr_t soc_acpi_write_tables(const struct device *device, uintptr_t current, + acpi_rsdp_t *rsdp);
#endif /* AMD_GLINDA_ACPI_H */ diff --git a/src/soc/amd/mendocino/agesa_acpi.c b/src/soc/amd/mendocino/agesa_acpi.c index 1e4d600..55267ec 100644 --- a/src/soc/amd/mendocino/agesa_acpi.c +++ b/src/soc/amd/mendocino/agesa_acpi.c @@ -9,8 +9,8 @@ #include <soc/acpi.h> #include <types.h>
-uintptr_t agesa_write_acpi_tables(const struct device *device, uintptr_t current, - acpi_rsdp_t *rsdp) +uintptr_t soc_acpi_write_tables(const struct device *device, uintptr_t current, + acpi_rsdp_t *rsdp) { /* TODO: look into adding CRAT */
diff --git a/src/soc/amd/mendocino/chip.c b/src/soc/amd/mendocino/chip.c index 840d29a..50a1edf 100644 --- a/src/soc/amd/mendocino/chip.c +++ b/src/soc/amd/mendocino/chip.c @@ -35,7 +35,7 @@
static void soc_init(void *chip_info) { - default_dev_ops_root.write_acpi_tables = agesa_write_acpi_tables; + default_dev_ops_root.write_acpi_tables = soc_acpi_write_tables;
amd_fsp_silicon_init();
diff --git a/src/soc/amd/mendocino/include/soc/acpi.h b/src/soc/amd/mendocino/include/soc/acpi.h index ac3c490..e1994aa 100644 --- a/src/soc/amd/mendocino/include/soc/acpi.h +++ b/src/soc/amd/mendocino/include/soc/acpi.h @@ -10,7 +10,7 @@
#define ACPI_SCI_IRQ 9
-uintptr_t agesa_write_acpi_tables(const struct device *device, uintptr_t current, - acpi_rsdp_t *rsdp); +uintptr_t soc_acpi_write_tables(const struct device *device, uintptr_t current, + acpi_rsdp_t *rsdp);
#endif /* AMD_MENDOCINO_ACPI_H */ diff --git a/src/soc/amd/phoenix/agesa_acpi.c b/src/soc/amd/phoenix/agesa_acpi.c index 598ae81..98e25f6 100644 --- a/src/soc/amd/phoenix/agesa_acpi.c +++ b/src/soc/amd/phoenix/agesa_acpi.c @@ -10,8 +10,8 @@ #include <soc/acpi.h> #include <types.h>
-uintptr_t agesa_write_acpi_tables(const struct device *device, uintptr_t current, - acpi_rsdp_t *rsdp) +uintptr_t soc_acpi_write_tables(const struct device *device, uintptr_t current, + acpi_rsdp_t *rsdp) { /* TODO: look into adding CRAT */
diff --git a/src/soc/amd/phoenix/chip.c b/src/soc/amd/phoenix/chip.c index ebc3c7c..970ac6f 100644 --- a/src/soc/amd/phoenix/chip.c +++ b/src/soc/amd/phoenix/chip.c @@ -37,7 +37,7 @@
static void soc_init(void *chip_info) { - default_dev_ops_root.write_acpi_tables = agesa_write_acpi_tables; + default_dev_ops_root.write_acpi_tables = soc_acpi_write_tables;
amd_fsp_silicon_init();
diff --git a/src/soc/amd/phoenix/include/soc/acpi.h b/src/soc/amd/phoenix/include/soc/acpi.h index 823b9ce8..39687219 100644 --- a/src/soc/amd/phoenix/include/soc/acpi.h +++ b/src/soc/amd/phoenix/include/soc/acpi.h @@ -12,7 +12,7 @@
#define ACPI_SCI_IRQ 9
-uintptr_t agesa_write_acpi_tables(const struct device *device, uintptr_t current, - acpi_rsdp_t *rsdp); +uintptr_t soc_acpi_write_tables(const struct device *device, uintptr_t current, + acpi_rsdp_t *rsdp);
#endif /* AMD_PHOENIX_ACPI_H */ diff --git a/src/soc/amd/picasso/agesa_acpi.c b/src/soc/amd/picasso/agesa_acpi.c index 7a32779..5604faa 100644 --- a/src/soc/amd/picasso/agesa_acpi.c +++ b/src/soc/amd/picasso/agesa_acpi.c @@ -539,8 +539,8 @@ return current; }
-uintptr_t agesa_write_acpi_tables(const struct device *device, uintptr_t current, - acpi_rsdp_t *rsdp) +uintptr_t soc_acpi_write_tables(const struct device *device, uintptr_t current, + acpi_rsdp_t *rsdp) { struct acpi_crat_header *crat;
diff --git a/src/soc/amd/picasso/chip.c b/src/soc/amd/picasso/chip.c index 4ddfa56..45b4ca2 100644 --- a/src/soc/amd/picasso/chip.c +++ b/src/soc/amd/picasso/chip.c @@ -36,7 +36,7 @@
static void soc_init(void *chip_info) { - default_dev_ops_root.write_acpi_tables = agesa_write_acpi_tables; + default_dev_ops_root.write_acpi_tables = soc_acpi_write_tables;
amd_fsp_silicon_init();
diff --git a/src/soc/amd/picasso/include/soc/acpi.h b/src/soc/amd/picasso/include/soc/acpi.h index 3b83123..7a0f749 100644 --- a/src/soc/amd/picasso/include/soc/acpi.h +++ b/src/soc/amd/picasso/include/soc/acpi.h @@ -10,7 +10,7 @@
#define ACPI_SCI_IRQ 9
-uintptr_t agesa_write_acpi_tables(const struct device *device, uintptr_t current, - acpi_rsdp_t *rsdp); +uintptr_t soc_acpi_write_tables(const struct device *device, uintptr_t current, + acpi_rsdp_t *rsdp);
#endif /* AMD_PICASSO_ACPI_H */ diff --git a/src/soc/amd/stoneyridge/northbridge.c b/src/soc/amd/stoneyridge/northbridge.c index 2b6ba45..5ac6909 100644 --- a/src/soc/amd/stoneyridge/northbridge.c +++ b/src/soc/amd/stoneyridge/northbridge.c @@ -131,9 +131,9 @@ return (unsigned long)current; }
-static unsigned long agesa_write_acpi_tables(const struct device *device, - unsigned long current, - acpi_rsdp_t *rsdp) +static unsigned long soc_acpi_write_tables(const struct device *device, + unsigned long current, + acpi_rsdp_t *rsdp) { acpi_srat_t *srat; acpi_slit_t *slit; @@ -210,7 +210,7 @@ .enable_resources = pci_dev_enable_resources, .init = northbridge_init, .acpi_fill_ssdt = acpi_fill_root_complex_tom, - .write_acpi_tables = agesa_write_acpi_tables, + .write_acpi_tables = soc_acpi_write_tables, };
/*