EricR Lai has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/48153 )
Change subject: soc/intel/alderlake: Align chipset.cb with pci_devs.h ......................................................................
soc/intel/alderlake: Align chipset.cb with pci_devs.h
Refer pci_devs.h naming to align chipset.cb. Correct thc0, thc1 and add cnvi_bt.
Signed-off-by: Eric Lai ericr_lai@compal.corp-partner.google.com Change-Id: Iac33983dc12ed4e5b9257c50d82adc8e4e728ad6 --- M src/soc/intel/alderlake/chipset.cb 1 file changed, 9 insertions(+), 8 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/48153/1
diff --git a/src/soc/intel/alderlake/chipset.cb b/src/soc/intel/alderlake/chipset.cb index ff81560..de880e3 100644 --- a/src/soc/intel/alderlake/chipset.cb +++ b/src/soc/intel/alderlake/chipset.cb @@ -13,18 +13,19 @@ device pci 08.0 alias gna off end device pci 09.0 alias north_tracehub off end device pci 0a.0 alias crashlog off end - device pci 0d.0 alias north_xhci off end - device pci 0d.1 alias north_xdci off end - device pci 0d.2 alias tbt_dma0 off end - device pci 0d.3 alias tbt_dma1 off end + device pci 0d.0 alias tcss_xhci off end + device pci 0d.1 alias tcss_xdci off end + device pci 0d.2 alias tcss_dma0 off end + device pci 0d.3 alias tcss_dma1 off end device pci 0e.0 alias vmd off end - device pci 10.6 alias thc0 off end - device pci 10.7 alias thc1 off end + device pci 10.0 alias thc0 off end + device pci 10.1 alias thc1 off end + device pci 10.2 alias cnvi_bt off end device pci 12.0 alias ish off end device pci 12.6 alias gspi2 off end device pci 13.0 alias gspi3 off end - device pci 14.0 alias south_xhci off end - device pci 14.1 alias south_xdci off end + device pci 14.0 alias xhci off end + device pci 14.1 alias usb_otg off end device pci 14.2 alias shared_sram off end device pci 14.3 alias cnvi_wifi off end device pci 15.0 alias i2c0 off end