Frank Wu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45565 )
Change subject: mb/google/zork/vilboz: Enable P sensor ......................................................................
mb/google/zork/vilboz: Enable P sensor
BUG=b:161759253 BRANCH=firmware-zork-13434.B TEST=emerge-zork coreboot chromeos-bootimage
Signed-off-by: Frank Wu frank_wu@compal.corp-partner.google.com Change-Id: I6294ce291365443dd1c4550ba75cb7f33481b889 --- M src/mainboard/google/zork/variants/vilboz/gpio.c M src/mainboard/google/zork/variants/vilboz/overridetree.cb 2 files changed, 9 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/65/45565/1
diff --git a/src/mainboard/google/zork/variants/vilboz/gpio.c b/src/mainboard/google/zork/variants/vilboz/gpio.c index 12b303a..d4bcfa5 100644 --- a/src/mainboard/google/zork/variants/vilboz/gpio.c +++ b/src/mainboard/google/zork/variants/vilboz/gpio.c @@ -10,6 +10,8 @@ static const struct soc_amd_gpio bid_1_gpio_set_stage_ram[] = { /* TP */ PAD_NC(GPIO_32), + /* P sensor INT */ + PAD_GPI(GPIO_40, PULL_NONE), /* EN_DEV_BEEP_L */ PAD_GPO(GPIO_89, HIGH), /* USI_RESET */ diff --git a/src/mainboard/google/zork/variants/vilboz/overridetree.cb b/src/mainboard/google/zork/variants/vilboz/overridetree.cb index d415de5..932805f 100644 --- a/src/mainboard/google/zork/variants/vilboz/overridetree.cb +++ b/src/mainboard/google/zork/variants/vilboz/overridetree.cb @@ -136,5 +136,12 @@ register "hid_desc_reg_offset" = "0x20" device i2c 2c on end end + chip drivers/i2c/generic + register "hid" = ""STH9324"" + register "name" = ""SEMTECH SX9324"" + register "desc" = ""SAR Proximity Sensor"" + register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_40)" + device i2c 28 on end + end end end # chip soc/amd/picasso