[coreboot-gerrit] Change in coreboot[master]: mb/google/kahlee: Do not enable SCI for H1_PCH_INT_ODL

[Kyösti Mälkki (Code Review)]

Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42874 )

Change subject: mb/google/kahlee: Do not enable SCI for H1_PCH_INT_ODL
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Patch Set 5:

(1 comment)

https://review.coreboot.org/c/coreboot/+/42874/4//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/c/coreboot/+/42874/4//COMMIT_MSG@7 
PS4, Line 7: mb/google/kahlee: Do not enable SCI for H1_PCH_INT_ODL
> H1_PCH_INT_ODL is basically the net name for this signal. […]

Thanks.. if they just were consistent. Evidently ther are some confusing aliases, would you sync those with schema.

kahlee

gpio.c:/* GPIO_9 - H1_PCH_INT_ODL */
  gpio.h:#define H1_PCH_INT GPIO_9

zork

gpio_baseboard_common.c:   /* H1_FCH_INT_ODL */
  gpio.h: #define H1_PCH_INT  GPIO_3

I associate PCH with Intel, google/kahlee is AMD. And open-drain sounds irrelevant for input pins so _ODL was just dropped at some places from the names it seems.