Elyes Haouas has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/68209 )
Change subject: sb/intel/{common,i82801gx}: Clean up includes ......................................................................
sb/intel/{common,i82801gx}: Clean up includes
Signed-off-by: Elyes Haouas ehaouas@noos.fr Change-Id: I972cc2d012dc1fb456c6251a0ae1cfd0a8075c09 --- M src/southbridge/intel/common/early_smbus.c M src/southbridge/intel/common/usb_debug.c M src/southbridge/intel/i82801gx/ac97.c M src/southbridge/intel/i82801gx/early_cir.c M src/southbridge/intel/i82801gx/early_init.c M src/southbridge/intel/i82801gx/ide.c M src/southbridge/intel/i82801gx/pci.c M src/southbridge/intel/i82801gx/pcie.c M src/southbridge/intel/i82801gx/sata.c M src/southbridge/intel/i82801gx/sata.h M src/southbridge/intel/i82801gx/usb.c 11 files changed, 45 insertions(+), 7 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/09/68209/1
diff --git a/src/southbridge/intel/common/early_smbus.c b/src/southbridge/intel/common/early_smbus.c index 6078b5f..4b7619c 100644 --- a/src/southbridge/intel/common/early_smbus.c +++ b/src/southbridge/intel/common/early_smbus.c @@ -3,7 +3,10 @@ #include <device/pci_def.h> #include <device/pci_ids.h> #include <device/pci_ops.h> +#include <device/pci_type.h> #include <device/smbus_host.h> +#include <stdint.h> + #include "early_smbus.h"
uintptr_t smbus_base(void) diff --git a/src/southbridge/intel/common/usb_debug.c b/src/southbridge/intel/common/usb_debug.c index 46c151c..dc9a568 100644 --- a/src/southbridge/intel/common/usb_debug.c +++ b/src/southbridge/intel/common/usb_debug.c @@ -3,10 +3,11 @@ // Use simple device model for this file even in ramstage #define __SIMPLE_DEVICE__
-#include <stdint.h> -#include <device/pci_ops.h> -#include <device/pci_ehci.h> #include <device/pci_def.h> +#include <device/pci_ehci.h> +#include <device/pci_ops.h> +#include <device/pci_type.h> +#include <stdint.h>
pci_devfn_t pci_ehci_dbg_dev(unsigned int hcd_idx) { diff --git a/src/southbridge/intel/i82801gx/ac97.c b/src/southbridge/intel/i82801gx/ac97.c index bdc8f77..2ab9ab1 100644 --- a/src/southbridge/intel/i82801gx/ac97.c +++ b/src/southbridge/intel/i82801gx/ac97.c @@ -8,6 +8,8 @@ #include <arch/io.h> #include <device/pci_ops.h> #include <delay.h> +#include <stdint.h> + #include "i82801gx.h"
#define NAMBAR 0x10 diff --git a/src/southbridge/intel/i82801gx/early_cir.c b/src/southbridge/intel/i82801gx/early_cir.c index 2e5e482..1018d76 100644 --- a/src/southbridge/intel/i82801gx/early_cir.c +++ b/src/southbridge/intel/i82801gx/early_cir.c @@ -2,6 +2,10 @@
#include <device/pci_def.h> #include <device/pci_ops.h> +#include <device/pci_type.h> +#include <southbridge/intel/common/rcba.h> +#include <stdint.h> + #include "i82801gx.h"
/* Chipset Initialization Registers magic */ diff --git a/src/southbridge/intel/i82801gx/early_init.c b/src/southbridge/intel/i82801gx/early_init.c index deb3deb..189abd6 100644 --- a/src/southbridge/intel/i82801gx/early_init.c +++ b/src/southbridge/intel/i82801gx/early_init.c @@ -1,7 +1,9 @@ /* SPDX-License-Identifier: GPL-2.0-only */
#include <console/console.h> +#include <device/device.h> #include <device/pci_ops.h> +#include <device/pci_type.h> #include <device/smbus_host.h> #include <southbridge/intel/common/gpio.h> #include <southbridge/intel/common/pmbase.h> diff --git a/src/southbridge/intel/i82801gx/ide.c b/src/southbridge/intel/i82801gx/ide.c index 71fc738..33e72ae 100644 --- a/src/southbridge/intel/i82801gx/ide.c +++ b/src/southbridge/intel/i82801gx/ide.c @@ -3,8 +3,11 @@ #include <console/console.h> #include <device/device.h> #include <device/pci.h> -#include <device/pci_ops.h> +#include <device/pci_def.h> #include <device/pci_ids.h> +#include <device/pci_ops.h> +#include <types.h> + #include "chip.h" #include "i82801gx.h"
diff --git a/src/southbridge/intel/i82801gx/pci.c b/src/southbridge/intel/i82801gx/pci.c index bf123bd..aeb301d 100644 --- a/src/southbridge/intel/i82801gx/pci.c +++ b/src/southbridge/intel/i82801gx/pci.c @@ -3,8 +3,10 @@ #include <device/device.h> #include <device/pci.h> #include <device/pci_def.h> -#include <device/pci_ops.h> #include <device/pci_ids.h> +#include <device/pci_ops.h> +#include <stdint.h> + #include "i82801gx.h"
static void pci_init(struct device *dev) diff --git a/src/southbridge/intel/i82801gx/pcie.c b/src/southbridge/intel/i82801gx/pcie.c index b9b8ccd..0d371d0 100644 --- a/src/southbridge/intel/i82801gx/pcie.c +++ b/src/southbridge/intel/i82801gx/pcie.c @@ -6,6 +6,9 @@ #include <device/pci_def.h> #include <device/pci_ops.h> #include <device/pci_ids.h> +#include <southbridge/intel/common/rcba.h> +#include <types.h> + #include "chip.h" #include "i82801gx.h"
diff --git a/src/southbridge/intel/i82801gx/sata.c b/src/southbridge/intel/i82801gx/sata.c index 2333c76..ad95a1b 100644 --- a/src/southbridge/intel/i82801gx/sata.c +++ b/src/southbridge/intel/i82801gx/sata.c @@ -2,9 +2,13 @@
#include <console/console.h> #include <device/device.h> +#include <device/mmio.h> #include <device/pci.h> -#include <device/pci_ops.h> +#include <device/pci_def.h> #include <device/pci_ids.h> +#include <device/pci_ops.h> +#include <types.h> + #include "chip.h" #include "i82801gx.h" #include "sata.h" diff --git a/src/southbridge/intel/i82801gx/sata.h b/src/southbridge/intel/i82801gx/sata.h index 664f594..cbd0eb7 100644 --- a/src/southbridge/intel/i82801gx/sata.h +++ b/src/southbridge/intel/i82801gx/sata.h @@ -3,6 +3,8 @@ #ifndef I82801GX_SATA_H #define I82801GX_SATA_H
+#include <device/device.h> + #define SATA_MAP 0x90 #define SATA_PCS 0x92 #define SATA_IR 0x94 diff --git a/src/southbridge/intel/i82801gx/usb.c b/src/southbridge/intel/i82801gx/usb.c index 4f3261f..5907120 100644 --- a/src/southbridge/intel/i82801gx/usb.c +++ b/src/southbridge/intel/i82801gx/usb.c @@ -3,8 +3,10 @@ #include <console/console.h> #include <device/device.h> #include <device/pci.h> -#include <device/pci_ops.h> +#include <device/pci_def.h> #include <device/pci_ids.h> +#include <device/pci_ops.h> + #include "i82801gx.h"
static void usb_init(struct device *dev)