Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35946 )
Change subject: driver/thunderbolt: Driver for allocating hotplug resources
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Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/35946/1/src/drivers/thunderbolt/thu...
File src/drivers/thunderbolt/thunderbolt.c:
https://review.coreboot.org/c/coreboot/+/35946/1/src/drivers/thunderbolt/thu...
PS1, Line 51: resource->flags |= IORESOURCE_IO;
I understand the requirements in order to set up a pci topology. […]
since you don't know what's getting hot-plugged during runtime, you'll probably just have to reserve a big enough mmio area the bridges decode. To change the mmio decode windows of the bridge, you'd probably have to move around other allocated resources which is either really difficult or more or less impossible when the driver for the other devices are loaded.
On why the non-prefetchable region can be smaller than the prefetchable: non-prefetchable is mainly used for register spaces in devices where reads and the sequence of writes can change the state of the device; if it just maps to some memory in the device it can be made prefetchable. So the prefetchable regions are bigger than the non-prefetchable ones
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