Angel Pons has submitted this change. ( https://review.coreboot.org/c/coreboot/+/47234 )
Change subject: sb/intel/lynxpoint: Correct SATA DTLE IOBP registers ......................................................................
sb/intel/lynxpoint: Correct SATA DTLE IOBP registers
Testing shows that these registers are backwards. Use the definitions from Broadwell instead. All affected boards use the same value for both.
Change-Id: Ie47c9fddc2e9e15ce4c64821ea3a69356ac31b1a Signed-off-by: Angel Pons th3fanbus@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/47234 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Nico Huber nico.h@gmx.de --- M src/southbridge/intel/lynxpoint/pch.h 1 file changed, 4 insertions(+), 4 deletions(-)
Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, approved
diff --git a/src/southbridge/intel/lynxpoint/pch.h b/src/southbridge/intel/lynxpoint/pch.h index 66cd05e..429dcc0 100644 --- a/src/southbridge/intel/lynxpoint/pch.h +++ b/src/southbridge/intel/lynxpoint/pch.h @@ -267,10 +267,10 @@ /* SATA IOBP Registers */ #define SATA_IOBP_SP0G3IR 0xea000151 #define SATA_IOBP_SP1G3IR 0xea000051 -#define SATA_IOBP_SP0DTLE_DATA 0xea002550 -#define SATA_IOBP_SP0DTLE_EDGE 0xea002554 -#define SATA_IOBP_SP1DTLE_DATA 0xea002750 -#define SATA_IOBP_SP1DTLE_EDGE 0xea002754 +#define SATA_IOBP_SP0DTLE_DATA 0xea002750 +#define SATA_IOBP_SP0DTLE_EDGE 0xea002754 +#define SATA_IOBP_SP1DTLE_DATA 0xea002550 +#define SATA_IOBP_SP1DTLE_EDGE 0xea002554
#define SATA_DTLE_MASK 0xF #define SATA_DTLE_DATA_SHIFT 24