[coreboot-gerrit] Change in coreboot[master]: [TESTONLY]nb/intel/x4x: Cache cbmem in romstage

[Arthur Heymans (Code Review)]

Attention is currently required from: Angel Pons.
Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37213 )

Change subject: [TESTONLY]nb/intel/x4x: Cache cbmem in romstage
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Patch Set 15:

(1 comment)

Commit Message:

https://review.coreboot.org/c/coreboot/+/37213/comment/5f1736c6_bb1c55b9 
PS15, Line 11: TESTED: works fine on P5QL-EM: ~2.5ms faster!
> With which CPU?

Some Conroe cpu iirc. It's been more than 2 years so I don't remember. I don't intend to merge this as these CPUs don't have nonevict.