[coreboot-gerrit] Change in coreboot[master]: soc/intel/common/cse: Add function to perform CSE lock configuration

[Sridhar Siricilla (Code Review)]

Attention is currently required from: Subrata Banik, Tim Wawrzynczak, Werner Zeh, Patrick Rudolph.
Sridhar Siricilla has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61520 )

Change subject: soc/intel/common/cse: Add function to perform CSE lock configuration
......................................................................

Patch Set 6:

(1 comment)

File src/soc/intel/common/block/cse/cse.c:

https://review.coreboot.org/c/coreboot/+/61520/comment/9aca85d7_2cbe08f8 
PS6, Line 1018: (cse_is_hfs1_com_normal() || cse_is_hfs1_com_soft_temp_disable())
> > > 3rd para says. […]
>
> **When CSE is always in bad state then how can one follow #2 so the only way is #1 hence, we should avoid locking the PMC cf9.**

Per the guide, when CSE is in bad state, global reset to be used. Please note OS  can't use neither GLOBAL RESET MEI message and global reset PCH register set.

I don't see any reason OS wants to use global reset as mentioned in the ME BWG.  The section# 3.5.1,  we are referring is, guidelines on usage of global reset & GLOBAL RESET MEI message.

Other section# 3.6.2 refers, when global reset (triggered through setting PCH registers) shouldn't be locked (if HFSTS1[4] is set).