[coreboot-gerrit] Change in coreboot[master]: sb/intel: Use PCI_BASE_ADDRESS_0 macro instead of magic number

[HAOUAS Elyes (Code Review)]

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44371 )

Change subject: sb/intel: Use PCI_BASE_ADDRESS_0 macro instead of magic number
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sb/intel: Use PCI_BASE_ADDRESS_0 macro instead of magic number

Change-Id: Id3390c5ac6a9517ffc2d202f41802e6f4d2e314c
Signed-off-by: Elyes HAOUAS 
---
M src/southbridge/intel/common/pciehp.c
M src/southbridge/intel/i82801gx/usb_ehci.c
M src/southbridge/intel/ibexpeak/thermal.c
3 files changed, 6 insertions(+), 3 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/71/44371/1

diff --git a/src/southbridge/intel/common/pciehp.c b/src/southbridge/intel/common/pciehp.c
index 5556aba..247bf5d 100644
--- a/src/southbridge/intel/common/pciehp.c
+++ b/src/southbridge/intel/common/pciehp.c
@@ -5,6 +5,7 @@
 #include <acpi/acpigen.h>
 #include <device/device.h>
 #include <device/pci.h>
+#include <device/pci_def.h>

#include "pciehp.h"

@@ -121,7 +122,7 @@
 {
    struct resource *resource;

-	resource = new_resource(dev, 0x10);
+	resource = new_resource(dev, PCI_BASE_ADDRESS_0);
    resource->size = 1 << 23;
    resource->align = 22;
    resource->gran = 22;
diff --git a/src/southbridge/intel/i82801gx/usb_ehci.c b/src/southbridge/intel/i82801gx/usb_ehci.c
index 0a66136..b01af96 100644
--- a/src/southbridge/intel/i82801gx/usb_ehci.c
+++ b/src/southbridge/intel/i82801gx/usb_ehci.c
@@ -7,6 +7,7 @@
 #include "i82801gx.h"
 #include <device/pci_ehci.h>
 #include <device/mmio.h>
+#include <device/pci_def.h>
 #include <device/pci_ops.h>

static void usb_ehci_init(struct device *dev)
@@ -23,7 +24,7 @@
    pci_update_config32(dev, 0xfc, ~(3 << 2), (2 << 2) | (1 << 29) | (1 << 17));

/* Clear any pending port changes */
-	res = find_resource(dev, 0x10);
+	res = find_resource(dev, PCI_BASE_ADDRESS_0);
    base = res2mmio(res, 0, 0);
    reg32 = read32(base + 0x24) | (1 << 2);
    write32(base + 0x24, reg32);
diff --git a/src/southbridge/intel/ibexpeak/thermal.c b/src/southbridge/intel/ibexpeak/thermal.c
index 0b496da..142d3c7 100644
--- a/src/southbridge/intel/ibexpeak/thermal.c
+++ b/src/southbridge/intel/ibexpeak/thermal.c
@@ -3,6 +3,7 @@
 #include <console/console.h>
 #include <device/device.h>
 #include <device/pci.h>
+#include <device/pci_def.h>
 #include <device/pci_ids.h>
 #include "pch.h"
 #include <device/mmio.h>
@@ -13,7 +14,7 @@
    u8 *base;
    printk(BIOS_DEBUG, "Thermal init start.\n");

-	res = find_resource(dev, 0x10);
+	res = find_resource(dev, PCI_BASE_ADDRESS_0);
    if (!res)
    	return;