Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36786 )
Change subject: soc/intel/common: Add function to wait for CSE to enter Soft Temp Disable mode ......................................................................
Patch Set 36:
(3 comments)
https://review.coreboot.org/c/coreboot/+/36786/36/src/soc/intel/common/block... File src/soc/intel/common/block/cse/cse.c:
https://review.coreboot.org/c/coreboot/+/36786/36/src/soc/intel/common/block... PS36, Line 314: HECI_DELAY_READY Is that the right timeout to use? I believe that is the one used for ensuring HECI is ready.
https://review.coreboot.org/c/coreboot/+/36786/36/src/soc/intel/common/block... PS36, Line 317: if (stopwatch_expired(&sw)) I think it would be good to have a print indicating the error?
https://review.coreboot.org/c/coreboot/+/36786/36/src/soc/intel/common/block... File src/soc/intel/common/block/include/intelblocks/cse.h:
https://review.coreboot.org/c/coreboot/+/36786/36/src/soc/intel/common/block... PS36, Line 200: cse_wait_com_soft_temp_disable I haven't seen the complete use of this yet, but I wonder if this really needs to be exposed out of the cse block. I imagine having a function like cse_reboot_to_ro() which takes all the steps required to ensure that CSE boots to RO and is ready for HMRFPO: --> Set next boot slot info --> CSE reset --> Wait for CSE to come back in Soft Temp Disable mode