[coreboot-gerrit] [S] Change in coreboot[master]: arch/x86: Only use .bss from car.ld when running XIP

[Felix Held (Code Review)]

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/48156 )

Change subject: arch/x86: Only use .bss from car.ld when running XIP
......................................................................

arch/x86: Only use .bss from car.ld when running XIP

Some platform run early stages like romstage and verstage from CAR
instead of XIP. This allows to link them like other arch inside the
_program region. This make in place LZ4 decompression possible as it
needs a bit of extra place to extract the code which is now provided by
the .bss.

Tested on up/squared (Intel APL).

Change-Id: I6cf51f943dde5f642d75ba4c5d3be520dc56370a
Signed-off-by: Arthur Heymans 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48156
Tested-by: build bot (Jenkins) 
Reviewed-by: Sean Rhodes 
Reviewed-by: Nico Huber 
---
M src/arch/x86/assembly_entry.S
M src/arch/x86/car.ld
M src/include/rules.h
M src/lib/program.ld
4 files changed, 30 insertions(+), 1 deletion(-)

Approvals:
  build bot (Jenkins): Verified
  Nico Huber: Looks good to me, but someone else must approve
  Sean Rhodes: Looks good to me, approved

diff --git a/src/arch/x86/assembly_entry.S b/src/arch/x86/assembly_entry.S
index 79d6e19..869acc8 100644
--- a/src/arch/x86/assembly_entry.S
+++ b/src/arch/x86/assembly_entry.S
@@ -34,6 +34,7 @@
    mov	$_STACK_TOP, %esp

/* clear .bss section as it is not shared */
+#if ENV_SEPARATE_BSS
    cld
    xor	%eax, %eax
    movl	$(_ebss), %ecx
@@ -41,6 +42,7 @@
    sub	%edi, %ecx
    shrl	$2, %ecx
    rep	stosl
+#endif

#if ((ENV_SEPARATE_VERSTAGE && CONFIG(VERSTAGE_DEBUG_SPINLOOP)) \
    || (ENV_ROMSTAGE && CONFIG(ROMSTAGE_DEBUG_SPINLOOP)))
diff --git a/src/arch/x86/car.ld b/src/arch/x86/car.ld
index 132937f..47afd78 100644
--- a/src/arch/x86/car.ld
+++ b/src/arch/x86/car.ld
@@ -59,6 +59,7 @@
     * cbmem console. This is useful for clearing this area on a per-stage
     * basis when more than one stage uses cache-as-ram. */

+#if ENV_SEPARATE_BSS
    . = ALIGN(ARCH_POINTER_ALIGN_SIZE);
    _bss = .;
    /* Allow global uninitialized variables for stages without CAR teardown. */
@@ -69,6 +70,7 @@
    . = ALIGN(ARCH_POINTER_ALIGN_SIZE);
    _ebss = .;
    RECORD_SIZE(bss)
+#endif

#if ENV_ROMSTAGE && CONFIG(ASAN_IN_ROMSTAGE)
    _shadow_size = (_ebss - _car_region_start) >> 3;
diff --git a/src/include/rules.h b/src/include/rules.h
index b2f2142..de33a78 100644
--- a/src/include/rules.h
+++ b/src/include/rules.h
@@ -275,6 +275,9 @@
 #define ENV_CACHE_AS_RAM		0
 #endif

+/* Indicates if the stage uses the _bss region defined in arch/x86/car.ld */
+#define ENV_SEPARATE_BSS	(ENV_CACHE_AS_RAM && (ENV_BOOTBLOCK || !CONFIG(NO_XIP_EARLY_STAGES)))
+
 /* Currently rmodules, ramstage and smm have heap. */
 #define ENV_HAS_HEAP_SECTION	(ENV_RMODULE || ENV_RAMSTAGE || ENV_SMM)

diff --git a/src/lib/program.ld b/src/lib/program.ld
index 8db7ddc..67f685f 100644
--- a/src/lib/program.ld
+++ b/src/lib/program.ld
@@ -116,7 +116,7 @@
 }
 #endif

-#if !ENV_CACHE_AS_RAM
+#if !ENV_SEPARATE_BSS
 .bss . : {
    . = ALIGN(ARCH_POINTER_ALIGN_SIZE);
    _bss = .;