Edward O'Callaghan (eocallaghan@alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6231
-gerrit
commit ee9764c8a70f37f76f34807a02f210d5e617e0e2 Author: Edward O'Callaghan eocallaghan@alterapraxis.com Date: Wed Jul 9 20:26:25 2014 +1000
superio: Use 'pnp_devfn_t' over 'device_t' in romstage component
The romstage component of Super I/O support is in fact written around passing a lower and upper half packed integer. We currently have two typedef's for this, 'device_t' and 'pnp_devfn_t'. We wish to make use of 'pnp_devfn_t' over 'device_t' as 'device_t' changes it's typedef in the ramstage context and so is really a conflicting definition. This helps solve problems down the road to having the 'real' 'device_t' definition usable in romstage later.
Change-Id: Ia9f238ebb944f9fe7b274621ee0c09a6de288a76 Signed-off-by: Edward O'Callaghan eocallaghan@alterapraxis.com --- src/superio/fintek/common/early_serial.c | 6 +++--- src/superio/fintek/common/fintek.h | 2 +- src/superio/intel/i3100/early_serial.c | 8 ++++---- src/superio/ite/common/early_serial.c | 16 ++++++++-------- src/superio/ite/common/ite.h | 10 +++++----- src/superio/ite/it8661f/early_serial.c | 10 +++++----- src/superio/ite/it8661f/it8661f.h | 2 +- src/superio/ite/it8671f/early_serial.c | 2 +- src/superio/ite/it8671f/it8671f.h | 2 +- src/superio/ite/it8718f/early_serial.c | 2 +- src/superio/ite/it8718f/it8718f.h | 2 +- src/superio/nsc/pc87309/early_serial.c | 2 +- src/superio/nsc/pc87309/pc87309.h | 2 +- src/superio/nsc/pc87351/early_serial.c | 2 +- src/superio/nsc/pc87360/early_serial.c | 2 +- src/superio/nsc/pc87366/early_serial.c | 2 +- src/superio/nsc/pc87392/early_serial.c | 2 +- src/superio/nsc/pc87417/early_serial.c | 4 ++-- src/superio/nsc/pc87417/pc87417.h | 2 +- src/superio/nsc/pc97317/early_serial.c | 2 +- src/superio/nuvoton/common/early_serial.c | 6 +++--- src/superio/nuvoton/common/nuvoton.h | 2 +- src/superio/nuvoton/nct5104d/early_init.c | 4 ++-- src/superio/serverengines/pilot/early_serial.c | 8 ++++---- src/superio/serverengines/pilot/pilot.h | 8 ++++---- src/superio/smsc/fdc37m60x/early_serial.c | 2 +- src/superio/smsc/kbc1100/early_init.c | 6 +++--- src/superio/smsc/kbc1100/kbc1100.h | 2 +- src/superio/smsc/lpc47b272/early_serial.c | 6 +++--- src/superio/smsc/lpc47b397/early_serial.c | 6 +++--- src/superio/smsc/lpc47m10x/early_serial.c | 6 +++--- src/superio/smsc/lpc47m15x/early_serial.c | 6 +++--- src/superio/smsc/lpc47n217/early_serial.c | 10 +++++----- src/superio/smsc/lpc47n227/early_serial.c | 10 +++++----- src/superio/smsc/sch4037/sch4037_early_init.c | 4 ++-- src/superio/smsc/sio1036/sio1036_early_init.c | 4 ++-- src/superio/smsc/smscsuperio/early_serial.c | 6 +++--- src/superio/smsc/smscsuperio/smscsuperio.h | 2 +- src/superio/winbond/common/early_serial.c | 6 +++--- src/superio/winbond/common/winbond.h | 2 +- src/superio/winbond/w83627dhg/early_serial.c | 8 ++++---- src/superio/winbond/w83627dhg/w83627dhg.h | 8 ++++---- src/superio/winbond/w83627ehg/early_serial.c | 4 ++-- src/superio/winbond/w83627ehg/w83627ehg.h | 4 ++-- src/superio/winbond/w83627hf/early_serial.c | 8 ++++---- src/superio/winbond/w83627hf/w83627hf.h | 4 ++-- src/superio/winbond/w83627thg/w83627thg.h | 6 +++--- src/superio/winbond/w83697hf/early_serial.c | 8 ++++---- src/superio/winbond/w83697hf/w83697hf.h | 4 ++-- src/superio/winbond/w83977f/early_serial.c | 6 +++--- src/superio/winbond/w83977tf/early_serial.c | 6 +++--- 51 files changed, 127 insertions(+), 127 deletions(-)
diff --git a/src/superio/fintek/common/early_serial.c b/src/superio/fintek/common/early_serial.c index d74b786..4433d11 100644 --- a/src/superio/fintek/common/early_serial.c +++ b/src/superio/fintek/common/early_serial.c @@ -46,7 +46,7 @@ #define FINTEK_EXIT_KEY 0xAA
/* Enable configuration: pass entry key '0x87' into index port dev. */ -static void pnp_enter_conf_state(device_t dev) +static void pnp_enter_conf_state(pnp_devfn_t dev) { u16 port = dev >> 8; outb(FINTEK_ENTRY_KEY, port); @@ -54,14 +54,14 @@ static void pnp_enter_conf_state(device_t dev) }
/* Disable configuration: pass exit key '0xAA' into index port dev. */ -static void pnp_exit_conf_state(device_t dev) +static void pnp_exit_conf_state(pnp_devfn_t dev) { u16 port = dev >> 8; outb(FINTEK_EXIT_KEY, port); }
/* Bring up early serial debugging output before the RAM is initialized. */ -void fintek_enable_serial(device_t dev, u16 iobase) +void fintek_enable_serial(pnp_devfn_t dev, u16 iobase) { pnp_enter_conf_state(dev); pnp_set_logical_device(dev); diff --git a/src/superio/fintek/common/fintek.h b/src/superio/fintek/common/fintek.h index a08cf92..1bc308b 100644 --- a/src/superio/fintek/common/fintek.h +++ b/src/superio/fintek/common/fintek.h @@ -24,6 +24,6 @@ #include <arch/io.h> #include <stdint.h>
-void fintek_enable_serial(device_t dev, u16 iobase); +void fintek_enable_serial(pnp_devfn_t dev, u16 iobase);
#endif /* SUPERIO_FINTEK_COMMON_ROMSTAGE_H */ diff --git a/src/superio/intel/i3100/early_serial.c b/src/superio/intel/i3100/early_serial.c index f95cf8a..96bb550 100644 --- a/src/superio/intel/i3100/early_serial.c +++ b/src/superio/intel/i3100/early_serial.c @@ -21,7 +21,7 @@ #include <arch/io.h> #include "i3100.h"
-static void pnp_enter_ext_func_mode(device_t dev) +static void pnp_enter_ext_func_mode(pnp_devfn_t dev) { u16 port = dev >> 8;
@@ -29,7 +29,7 @@ static void pnp_enter_ext_func_mode(device_t dev) outb(0x86, port); }
-static void pnp_exit_ext_func_mode(device_t dev) +static void pnp_exit_ext_func_mode(pnp_devfn_t dev) { u16 port = dev >> 8;
@@ -38,14 +38,14 @@ static void pnp_exit_ext_func_mode(device_t dev) }
/* Enable device interrupts, set UART_CLK predivide. */ -static void i3100_configure_uart_clk(device_t dev, u8 predivide) +static void i3100_configure_uart_clk(pnp_devfn_t dev, u8 predivide) { pnp_enter_ext_func_mode(dev); pnp_write_config(dev, I3100_SIW_CONFIGURATION, (predivide << 2) | 1); pnp_exit_ext_func_mode(dev); }
-static void i3100_enable_serial(device_t dev, u16 iobase) +static void i3100_enable_serial(pnp_devfn_t dev, u16 iobase) { pnp_enter_ext_func_mode(dev); pnp_set_logical_device(dev); diff --git a/src/superio/ite/common/early_serial.c b/src/superio/ite/common/early_serial.c index 73354d4..a57c047 100644 --- a/src/superio/ite/common/early_serial.c +++ b/src/superio/ite/common/early_serial.c @@ -33,14 +33,14 @@ #define ITE_CONFIG_REG_WATCHDOG 0x72 /* watchdog config */
/* Helper procedure */ -static void ite_sio_write(device_t dev, u8 reg, u8 value) +static void ite_sio_write(pnp_devfn_t dev, u8 reg, u8 value) { pnp_set_logical_device(dev); pnp_write_config(dev, reg, value); }
/* Enable configuration */ -static void pnp_enter_conf_state(device_t dev) +static void pnp_enter_conf_state(pnp_devfn_t dev) { u16 port = dev >> 8;
@@ -51,12 +51,12 @@ static void pnp_enter_conf_state(device_t dev) }
/* Disable configuration */ -static void pnp_exit_conf_state(device_t dev) +static void pnp_exit_conf_state(pnp_devfn_t dev) { ite_sio_write(dev, ITE_CONFIG_REG_CC, 0x02); }
-void ite_reg_write(device_t dev, u8 reg, u8 value) +void ite_reg_write(pnp_devfn_t dev, u8 reg, u8 value) { pnp_enter_conf_state(dev); ite_sio_write(dev, reg, value); @@ -71,13 +71,13 @@ void ite_reg_write(device_t dev, u8 reg, u8 value) * ITE_UART_CLK_PREDIVIDE_24 * ITE_UART_CLK_PREDIVIDE_48 (default) */ -void ite_conf_clkin(device_t dev, u8 predivide) +void ite_conf_clkin(pnp_devfn_t dev, u8 predivide) { ite_reg_write(dev, ITE_CONFIG_REG_CLOCKSEL, (0x1 & predivide)); }
/* Bring up early serial debugging output before the RAM is initialized. */ -void ite_enable_serial(device_t dev, u16 iobase) +void ite_enable_serial(pnp_devfn_t dev, u16 iobase) { pnp_enter_conf_state(dev); pnp_set_logical_device(dev); @@ -101,7 +101,7 @@ void ite_enable_serial(device_t dev, u16 iobase) * and pass: GPIO_DEV */
-void ite_enable_3vsbsw(device_t dev) +void ite_enable_3vsbsw(pnp_devfn_t dev) { u8 tmp; pnp_enter_conf_state(dev); @@ -118,7 +118,7 @@ void ite_enable_3vsbsw(device_t dev) * and pass: GPIO_DEV */
-void ite_kill_watchdog(device_t dev) +void ite_kill_watchdog(pnp_devfn_t dev) { pnp_enter_conf_state(dev); ite_sio_write(dev, ITE_CONFIG_REG_WATCHDOG, 0x00); diff --git a/src/superio/ite/common/ite.h b/src/superio/ite/common/ite.h index 5389f14..c732664 100644 --- a/src/superio/ite/common/ite.h +++ b/src/superio/ite/common/ite.h @@ -27,12 +27,12 @@ #define ITE_UART_CLK_PREDIVIDE_48 0x00 /* default */ #define ITE_UART_CLK_PREDIVIDE_24 0x01
-void ite_conf_clkin(device_t dev, u8 predivide); -void ite_enable_serial(device_t dev, u16 iobase); +void ite_conf_clkin(pnp_devfn_t dev, u8 predivide); +void ite_enable_serial(pnp_devfn_t dev, u16 iobase);
/* Some boards need to init wdt+gpio's very early */ -void ite_reg_write(device_t dev, u8 reg, u8 value); -void ite_enable_3vsbsw(device_t dev); -void ite_kill_watchdog(device_t dev); +void ite_reg_write(pnp_devfn_t dev, u8 reg, u8 value); +void ite_enable_3vsbsw(pnp_devfn_t dev); +void ite_kill_watchdog(pnp_devfn_t dev);
#endif /* SUPERIO_ITE_COMMON_ROMSTAGE_H */ diff --git a/src/superio/ite/it8661f/early_serial.c b/src/superio/ite/it8661f/early_serial.c index 7373f71..19d60b1 100644 --- a/src/superio/ite/it8661f/early_serial.c +++ b/src/superio/ite/it8661f/early_serial.c @@ -26,7 +26,7 @@ /* Base address 0x3f0: 0x86 0x80 0x55 0x55. */ /* Base address 0x3bd: 0x86 0x80 0x55 0xaa. */ /* Base address 0x370: 0x86 0x80 0xaa 0x55. */ -static void pnp_enter_ext_func_mode(device_t dev) +static void pnp_enter_ext_func_mode(pnp_devfn_t dev) { int i; u16 port = dev >> 8; @@ -42,7 +42,7 @@ static void pnp_enter_ext_func_mode(device_t dev) outb(init_values[i], port); }
-static void pnp_exit_ext_func_mode(device_t dev) +static void pnp_exit_ext_func_mode(pnp_devfn_t dev) { pnp_write_config(dev, IT8661F_REG_CC, (1 << 1)); } @@ -55,21 +55,21 @@ static void pnp_exit_ext_func_mode(device_t dev) * * Bits: FDC (0), Com1 (1), Com2 (2), PP (3), IR (4). Bits 5-7 are reserved. */ -static void it8661f_enable_logical_devices(device_t dev) +static void it8661f_enable_logical_devices(pnp_devfn_t dev) { pnp_enter_ext_func_mode(dev); pnp_write_config(dev, IT8661F_REG_LDE, 0x1f); pnp_exit_ext_func_mode(dev); }
-static void it8661f_set_clkin(device_t dev, u8 clkin) +static void it8661f_set_clkin(pnp_devfn_t dev, u8 clkin) { pnp_enter_ext_func_mode(dev); pnp_write_config(dev, IT8661F_REG_SWSUSP, (clkin << 1)); pnp_exit_ext_func_mode(dev); }
-void it8661f_enable_serial(device_t dev, u16 iobase) +void it8661f_enable_serial(pnp_devfn_t dev, u16 iobase) { pnp_enter_ext_func_mode(dev); pnp_set_logical_device(dev); diff --git a/src/superio/ite/it8661f/it8661f.h b/src/superio/ite/it8661f/it8661f.h index 045a54c..297dea3 100644 --- a/src/superio/ite/it8661f/it8661f.h +++ b/src/superio/ite/it8661f/it8661f.h @@ -52,6 +52,6 @@ static const u8 init_values[] = { 0xe8, 0x74, 0x3a, 0x9d, /**/ 0xce, 0xe7, 0x73, 0x39, };
-void it8661f_enable_serial(device_t dev, u16 iobase); +void it8661f_enable_serial(pnp_devfn_t dev, u16 iobase);
#endif /* SUPERIO_ITE_IT8661F_H */ diff --git a/src/superio/ite/it8671f/early_serial.c b/src/superio/ite/it8671f/early_serial.c index 9f35b8a..89feb5f 100644 --- a/src/superio/ite/it8671f/early_serial.c +++ b/src/superio/ite/it8671f/early_serial.c @@ -89,7 +89,7 @@ void it8671f_48mhz_clkin(void) }
/* Enable the serial port(s). */ -void it8671f_enable_serial(device_t dev, u16 iobase) +void it8671f_enable_serial(pnp_devfn_t dev, u16 iobase) { it8671f_enter_conf();
diff --git a/src/superio/ite/it8671f/it8671f.h b/src/superio/ite/it8671f/it8671f.h index c3865ff..90f1481 100644 --- a/src/superio/ite/it8671f/it8671f.h +++ b/src/superio/ite/it8671f/it8671f.h @@ -34,6 +34,6 @@ #define IT8671F_KBCM 0x06 /* PS/2 mouse */
void it8671f_48mhz_clkin(void); -void it8671f_enable_serial(device_t dev, u16 iobase); +void it8671f_enable_serial(pnp_devfn_t dev, u16 iobase);
#endif /* SUPERIO_ITE_IT8671F__H */ diff --git a/src/superio/ite/it8718f/early_serial.c b/src/superio/ite/it8718f/early_serial.c index 166c856..563132a 100644 --- a/src/superio/ite/it8718f/early_serial.c +++ b/src/superio/ite/it8718f/early_serial.c @@ -27,7 +27,7 @@ * mechanism. It lives in the GPIO LDN. However, register 0xEF is not * mentioned in the IT8718F datasheet so just hardcode it to 0x7E for now. */ -void it8718f_disable_reboot(device_t dev) +void it8718f_disable_reboot(pnp_devfn_t dev) { ite_reg_write(dev, 0xEF, 0x7E); } diff --git a/src/superio/ite/it8718f/it8718f.h b/src/superio/ite/it8718f/it8718f.h index 61c75cf..c0a79c2 100644 --- a/src/superio/ite/it8718f/it8718f.h +++ b/src/superio/ite/it8718f/it8718f.h @@ -35,6 +35,6 @@ #define IT8718F_GPIO 0x07 /* GPIO */ #define IT8718F_IR 0x0a /* Consumer IR */
-void it8718f_disable_reboot(device_t dev); +void it8718f_disable_reboot(pnp_devfn_t dev);
#endif /* SUPERIO_ITE_IT8718F_H */ diff --git a/src/superio/nsc/pc87309/early_serial.c b/src/superio/nsc/pc87309/early_serial.c index 6e48e0c..da0d5d7 100644 --- a/src/superio/nsc/pc87309/early_serial.c +++ b/src/superio/nsc/pc87309/early_serial.c @@ -22,7 +22,7 @@ #include <device/pnp_def.h> #include "pc87309.h"
-void pc87309_enable_serial(device_t dev, u16 iobase) +void pc87309_enable_serial(pnp_devfn_t dev, u16 iobase) { pnp_set_logical_device(dev); pnp_set_enable(dev, 0); diff --git a/src/superio/nsc/pc87309/pc87309.h b/src/superio/nsc/pc87309/pc87309.h index 5f39b6e..513576e 100644 --- a/src/superio/nsc/pc87309/pc87309.h +++ b/src/superio/nsc/pc87309/pc87309.h @@ -34,6 +34,6 @@ #include <arch/io.h> #include <stdint.h>
-void pc87309_enable_serial(device_t dev, u16 iobase); +void pc87309_enable_serial(pnp_devfn_t dev, u16 iobase);
#endif /* SUPERIO_NSC_PC87309_H */ diff --git a/src/superio/nsc/pc87351/early_serial.c b/src/superio/nsc/pc87351/early_serial.c index c34538f..a31f79c 100644 --- a/src/superio/nsc/pc87351/early_serial.c +++ b/src/superio/nsc/pc87351/early_serial.c @@ -22,7 +22,7 @@ #include <arch/io.h> #include "pc87351.h"
-static void pc87351_enable_serial(device_t dev, u16 iobase) +static void pc87351_enable_serial(pnp_devfn_t dev, u16 iobase) { pnp_set_logical_device(dev); pnp_set_enable(dev, 0); diff --git a/src/superio/nsc/pc87360/early_serial.c b/src/superio/nsc/pc87360/early_serial.c index da4abdb..3deac3b 100644 --- a/src/superio/nsc/pc87360/early_serial.c +++ b/src/superio/nsc/pc87360/early_serial.c @@ -22,7 +22,7 @@ #include <arch/io.h> #include "pc87360.h"
-static void pc87360_enable_serial(device_t dev, u16 iobase) +static void pc87360_enable_serial(pnp_devfn_t dev, u16 iobase) { pnp_set_logical_device(dev); pnp_set_enable(dev, 0); diff --git a/src/superio/nsc/pc87366/early_serial.c b/src/superio/nsc/pc87366/early_serial.c index e173afd..e663df6 100644 --- a/src/superio/nsc/pc87366/early_serial.c +++ b/src/superio/nsc/pc87366/early_serial.c @@ -22,7 +22,7 @@ #include <arch/io.h> #include "pc87366.h"
-static void pc87366_enable_serial(device_t dev, u16 iobase) +static void pc87366_enable_serial(pnp_devfn_t dev, u16 iobase) { pnp_set_logical_device(dev); pnp_set_enable(dev, 0); diff --git a/src/superio/nsc/pc87392/early_serial.c b/src/superio/nsc/pc87392/early_serial.c index 6e85fb9..f1e5716 100644 --- a/src/superio/nsc/pc87392/early_serial.c +++ b/src/superio/nsc/pc87392/early_serial.c @@ -21,7 +21,7 @@ #include <arch/io.h> #include "pc87392.h"
-static void pc87392_enable_serial(device_t dev, u16 iobase) +static void pc87392_enable_serial(pnp_devfn_t dev, u16 iobase) { pnp_set_logical_device(dev); pnp_set_enable(dev, 0); diff --git a/src/superio/nsc/pc87417/early_serial.c b/src/superio/nsc/pc87417/early_serial.c index 33bae7e..42ba941 100644 --- a/src/superio/nsc/pc87417/early_serial.c +++ b/src/superio/nsc/pc87417/early_serial.c @@ -23,7 +23,7 @@ #include <arch/io.h> #include "pc87417.h"
-void pc87417_enable_serial(device_t dev, u16 iobase) +void pc87417_enable_serial(pnp_devfn_t dev, u16 iobase) { pnp_set_logical_device(dev); pnp_set_enable(dev, 0); @@ -31,7 +31,7 @@ void pc87417_enable_serial(device_t dev, u16 iobase) pnp_set_enable(dev, 1); }
-void pc87417_enable_dev(device_t dev) +void pc87417_enable_dev(pnp_devfn_t dev) { pnp_set_logical_device(dev); pnp_set_enable(dev, 1); diff --git a/src/superio/nsc/pc87417/pc87417.h b/src/superio/nsc/pc87417/pc87417.h index 73c1fbc..20b9681 100644 --- a/src/superio/nsc/pc87417/pc87417.h +++ b/src/superio/nsc/pc87417/pc87417.h @@ -115,7 +115,7 @@ #define PC87417_XWBCNF 0x16
#if defined(__PRE_RAM__) -void pc87417_enable_serial(device_t dev, u16 iobase); +void pc87417_enable_serial(pnp_devfn_t dev, u16 iobase); void pc87417_enable_dev(device_t dev); #endif
diff --git a/src/superio/nsc/pc97317/early_serial.c b/src/superio/nsc/pc97317/early_serial.c index 0c21561..ad43010 100644 --- a/src/superio/nsc/pc97317/early_serial.c +++ b/src/superio/nsc/pc97317/early_serial.c @@ -25,7 +25,7 @@ #define PM_BASE 0xe8
/* The PC97317 needs clocks to be set up before the serial port will operate. */ -static void pc97317_enable_serial(device_t dev, u16 iobase) +static void pc97317_enable_serial(pnp_devfn_t dev, u16 iobase) { /* Set base address of power management unit. */ pnp_set_logical_device(PM_DEV); diff --git a/src/superio/nuvoton/common/early_serial.c b/src/superio/nuvoton/common/early_serial.c index 1cbcee8..dbb0d13 100644 --- a/src/superio/nuvoton/common/early_serial.c +++ b/src/superio/nuvoton/common/early_serial.c @@ -49,7 +49,7 @@
/* Enable configuration: pass entry key '0x87' into index port dev * two times. */ -static void pnp_enter_conf_state(device_t dev) +static void pnp_enter_conf_state(pnp_devfn_t dev) { u16 port = dev >> 8; outb(NUVOTON_ENTRY_KEY, port); @@ -57,14 +57,14 @@ static void pnp_enter_conf_state(device_t dev) }
/* Disable configuration: pass exit key '0xAA' into index port dev. */ -static void pnp_exit_conf_state(device_t dev) +static void pnp_exit_conf_state(pnp_devfn_t dev) { u16 port = dev >> 8; outb(NUVOTON_EXIT_KEY, port); }
/* Bring up early serial debugging output before the RAM is initialized. */ -void nuvoton_enable_serial(device_t dev, u16 iobase) +void nuvoton_enable_serial(pnp_devfn_t dev, u16 iobase) { pnp_enter_conf_state(dev); pnp_set_logical_device(dev); diff --git a/src/superio/nuvoton/common/nuvoton.h b/src/superio/nuvoton/common/nuvoton.h index e9e8d4b..43d80a9 100644 --- a/src/superio/nuvoton/common/nuvoton.h +++ b/src/superio/nuvoton/common/nuvoton.h @@ -25,6 +25,6 @@ #include <arch/io.h> #include <stdint.h>
-void nuvoton_enable_serial(device_t dev, u16 iobase); +void nuvoton_enable_serial(pnp_devfn_t dev, u16 iobase);
#endif /* SUPERIO_NUVOTON_COMMON_ROMSTAGE_H */ diff --git a/src/superio/nuvoton/nct5104d/early_init.c b/src/superio/nuvoton/nct5104d/early_init.c index c9a408e..0d986d7 100644 --- a/src/superio/nuvoton/nct5104d/early_init.c +++ b/src/superio/nuvoton/nct5104d/early_init.c @@ -28,7 +28,7 @@
/* Enable configuration: pass entry key '0x87' into index port dev * two times. */ -static void pnp_enter_conf_state(device_t dev) +static void pnp_enter_conf_state(pnp_devfn_t dev) { u16 port = dev >> 8; outb(NUVOTON_ENTRY_KEY, port); @@ -36,7 +36,7 @@ static void pnp_enter_conf_state(device_t dev) }
/* Disable configuration: pass exit key '0xAA' into index port dev. */ -static void pnp_exit_conf_state(device_t dev) +static void pnp_exit_conf_state(pnp_devfn_t dev) { u16 port = dev >> 8; outb(NUVOTON_EXIT_KEY, port); diff --git a/src/superio/serverengines/pilot/early_serial.c b/src/superio/serverengines/pilot/early_serial.c index 82e124c..3e99ef4 100644 --- a/src/superio/serverengines/pilot/early_serial.c +++ b/src/superio/serverengines/pilot/early_serial.c @@ -26,20 +26,20 @@ #include "pilot.h"
/* Pilot uses 0x5A/0xA5 pattern to actiavte deactivate config access. */ -void pnp_enter_ext_func_mode(device_t dev) +void pnp_enter_ext_func_mode(pnp_devfn_t dev) { u16 port = dev >> 8; outb(0x5A, port); }
-void pnp_exit_ext_func_mode(device_t dev) +void pnp_exit_ext_func_mode(pnp_devfn_t dev) { u16 port = dev >> 8; outb(0xA5, port); }
/* Serial config is a fairly standard procedure. */ -void pilot_enable_serial(device_t dev, u16 iobase) +void pilot_enable_serial(pnp_devfn_t dev, u16 iobase) { pnp_enter_ext_func_mode(dev); pnp_set_logical_device(dev); @@ -48,7 +48,7 @@ void pilot_enable_serial(device_t dev, u16 iobase) pnp_exit_ext_func_mode(dev); }
-void pilot_disable_serial(device_t dev) +void pilot_disable_serial(pnp_devfn_t dev) { pnp_enter_ext_func_mode(dev); pnp_set_logical_device(dev); diff --git a/src/superio/serverengines/pilot/pilot.h b/src/superio/serverengines/pilot/pilot.h index e19cf37..a08f1a2 100644 --- a/src/superio/serverengines/pilot/pilot.h +++ b/src/superio/serverengines/pilot/pilot.h @@ -31,12 +31,12 @@ #define PILOT_LD7 0x07 /* Logical device 7 */
/* should not expose these however early_init needs love */ -void pnp_enter_ext_func_mode(device_t dev); -void pnp_exit_ext_func_mode(device_t dev); +void pnp_enter_ext_func_mode(pnp_devfn_t dev); +void pnp_exit_ext_func_mode(pnp_devfn_t dev);
void pilot_early_init(device_t dev);
-void pilot_enable_serial(device_t dev, u16 iobase); -void pilot_disable_serial(device_t dev); +void pilot_enable_serial(pnp_devfn_t dev, u16 iobase); +void pilot_disable_serial(pnp_devfn_t dev);
#endif /* SUPERIO_SERVERENGINES_PILOT_PILOT_H */ diff --git a/src/superio/smsc/fdc37m60x/early_serial.c b/src/superio/smsc/fdc37m60x/early_serial.c index 38cb0f8..80258a9 100644 --- a/src/superio/smsc/fdc37m60x/early_serial.c +++ b/src/superio/smsc/fdc37m60x/early_serial.c @@ -46,7 +46,7 @@ static void fdc37m60x_sio_write(uint8_t ldn, u8 index, u8 value) }
/* Enable the peripheral devices on the FDC37M60X Super I/O chip. */ -static void fdc37m60x_enable_serial(device_t dev, u16 iobase) +static void fdc37m60x_enable_serial(pnp_devfn_t dev, u16 iobase) { /* (1) Enter the configuration state. */ outb(0x55, FDC37M60X_CONFIGURATION_PORT); diff --git a/src/superio/smsc/kbc1100/early_init.c b/src/superio/smsc/kbc1100/early_init.c index d075f9c..c912174 100644 --- a/src/superio/smsc/kbc1100/early_init.c +++ b/src/superio/smsc/kbc1100/early_init.c @@ -26,19 +26,19 @@
#include "kbc1100.h"
-static void pnp_enter_conf_state(device_t dev) +static void pnp_enter_conf_state(pnp_devfn_t dev) { u16 port = dev >> 8; outb(0x55, port); }
-static void pnp_exit_conf_state(device_t dev) +static void pnp_exit_conf_state(pnp_devfn_t dev) { u16 port = dev >> 8; outb(0xaa, port); }
-void kbc1100_early_serial(device_t dev, u16 iobase) +void kbc1100_early_serial(pnp_devfn_t dev, u16 iobase) { pnp_enter_conf_state(dev); pnp_set_logical_device(dev); diff --git a/src/superio/smsc/kbc1100/kbc1100.h b/src/superio/smsc/kbc1100/kbc1100.h index 2b588f9..ec24dd3 100644 --- a/src/superio/smsc/kbc1100/kbc1100.h +++ b/src/superio/smsc/kbc1100/kbc1100.h @@ -36,7 +36,7 @@ #define KBC1100_EC1 0x0D /* EC Channel 1 */ #define KBC1100_EC2 0x0E /* EC Channel 2 */
-void kbc1100_early_serial(device_t dev, u16 iobase); +void kbc1100_early_serial(pnp_devfn_t dev, u16 iobase); void kbc1100_early_init(u16 port);
#endif /* SUPERIO_SMSC_KBC1100_H */ diff --git a/src/superio/smsc/lpc47b272/early_serial.c b/src/superio/smsc/lpc47b272/early_serial.c index b2f0d1b..3624df2 100644 --- a/src/superio/smsc/lpc47b272/early_serial.c +++ b/src/superio/smsc/lpc47b272/early_serial.c @@ -23,13 +23,13 @@ #include <arch/io.h> #include "lpc47b272.h"
-static void pnp_enter_conf_state(device_t dev) +static void pnp_enter_conf_state(pnp_devfn_t dev) { u16 port = dev >> 8; outb(0x55, port); }
-static void pnp_exit_conf_state(device_t dev) +static void pnp_exit_conf_state(pnp_devfn_t dev) { u16 port = dev >> 8; outb(0xaa, port); @@ -42,7 +42,7 @@ static void pnp_exit_conf_state(device_t dev) * @param dev High 8 bits = Super I/O port, low 8 bits = logical device number. * @param iobase Processor I/O port address to assign to this serial device. */ -static void lpc47b272_enable_serial(device_t dev, u16 iobase) +static void lpc47b272_enable_serial(pnp_devfn_t dev, u16 iobase) { pnp_enter_conf_state(dev); pnp_set_logical_device(dev); diff --git a/src/superio/smsc/lpc47b397/early_serial.c b/src/superio/smsc/lpc47b397/early_serial.c index 31d515b..953cd4b 100644 --- a/src/superio/smsc/lpc47b397/early_serial.c +++ b/src/superio/smsc/lpc47b397/early_serial.c @@ -23,19 +23,19 @@ #include <arch/io.h> #include "lpc47b397.h"
-static void pnp_enter_conf_state(device_t dev) +static void pnp_enter_conf_state(pnp_devfn_t dev) { u16 port = dev >> 8; outb(0x55, port); }
-static void pnp_exit_conf_state(device_t dev) +static void pnp_exit_conf_state(pnp_devfn_t dev) { u16 port = dev >> 8; outb(0xaa, port); }
-static void lpc47b397_enable_serial(device_t dev, u16 iobase) +static void lpc47b397_enable_serial(pnp_devfn_t dev, u16 iobase) { pnp_enter_conf_state(dev); pnp_set_logical_device(dev); diff --git a/src/superio/smsc/lpc47m10x/early_serial.c b/src/superio/smsc/lpc47m10x/early_serial.c index fc6efb9..1174120 100644 --- a/src/superio/smsc/lpc47m10x/early_serial.c +++ b/src/superio/smsc/lpc47m10x/early_serial.c @@ -21,13 +21,13 @@ #include <arch/io.h> #include "lpc47m10x.h"
-static void pnp_enter_conf_state(device_t dev) +static void pnp_enter_conf_state(pnp_devfn_t dev) { u16 port = dev >> 8; outb(0x55, port); }
-static void pnp_exit_conf_state(device_t dev) +static void pnp_exit_conf_state(pnp_devfn_t dev) { u16 port = dev >> 8; outb(0xaa, port); @@ -40,7 +40,7 @@ static void pnp_exit_conf_state(device_t dev) * @param dev High 8 bits = Super I/O port, low 8 bits = logical device number. * @param iobase Processor I/O port address to assign to this serial device. */ -static void lpc47m10x_enable_serial(device_t dev, u16 iobase) +static void lpc47m10x_enable_serial(pnp_devfn_t dev, u16 iobase) { pnp_enter_conf_state(dev); pnp_set_logical_device(dev); diff --git a/src/superio/smsc/lpc47m15x/early_serial.c b/src/superio/smsc/lpc47m15x/early_serial.c index 7d75bae..5a16c25 100644 --- a/src/superio/smsc/lpc47m15x/early_serial.c +++ b/src/superio/smsc/lpc47m15x/early_serial.c @@ -22,19 +22,19 @@ #include <arch/io.h> #include "lpc47m15x.h"
-static void pnp_enter_conf_state(device_t dev) +static void pnp_enter_conf_state(pnp_devfn_t dev) { u16 port = dev >> 8; outb(0x55, port); }
-static void pnp_exit_conf_state(device_t dev) +static void pnp_exit_conf_state(pnp_devfn_t dev) { u16 port = dev >> 8; outb(0xaa, port); }
-static inline void lpc47m15x_enable_serial(device_t dev, u16 iobase) +static inline void lpc47m15x_enable_serial(pnp_devfn_t dev, u16 iobase) { pnp_enter_conf_state(dev); pnp_set_logical_device(dev); diff --git a/src/superio/smsc/lpc47n217/early_serial.c b/src/superio/smsc/lpc47n217/early_serial.c index 451628a..7405f32 100644 --- a/src/superio/smsc/lpc47n217/early_serial.c +++ b/src/superio/smsc/lpc47n217/early_serial.c @@ -24,13 +24,13 @@ #include <assert.h> #include "lpc47n217.h"
-static void pnp_enter_conf_state(device_t dev) +static void pnp_enter_conf_state(pnp_devfn_t dev) { u16 port = dev >> 8; outb(0x55, port); }
-static void pnp_exit_conf_state(device_t dev) +static void pnp_exit_conf_state(pnp_devfn_t dev) { u16 port = dev >> 8; outb(0xaa, port); @@ -42,7 +42,7 @@ static void pnp_exit_conf_state(device_t dev) * @param dev High 8 bits = Super I/O port, low 8 bits = logical device number. * @param iobase Base I/O port for the logical device. */ -static void lpc47n217_pnp_set_iobase(device_t dev, u16 iobase) +static void lpc47n217_pnp_set_iobase(pnp_devfn_t dev, u16 iobase) { /* LPC47N217 requires base ports to be a multiple of 4. */ ASSERT(!(iobase & 0x3)); @@ -74,7 +74,7 @@ static void lpc47n217_pnp_set_iobase(device_t dev, u16 iobase) * @param dev High 8 bits = Super I/O port, low 8 bits = logical device number. * @param enable 0 to disable, anythig else to enable. */ -static void lpc47n217_pnp_set_enable(device_t dev, int enable) +static void lpc47n217_pnp_set_enable(pnp_devfn_t dev, int enable) { u8 power_register = 0, power_mask = 0, current_power, new_power;
@@ -109,7 +109,7 @@ static void lpc47n217_pnp_set_enable(device_t dev, int enable) * @param dev High 8 bits = Super I/O port, low 8 bits = logical device number. * @param iobase Processor I/O port address to assign to this serial device. */ -static void lpc47n217_enable_serial(device_t dev, u16 iobase) +static void lpc47n217_enable_serial(pnp_devfn_t dev, u16 iobase) { /* * NOTE: Cannot use pnp_set_XXX() here because they assume chip diff --git a/src/superio/smsc/lpc47n227/early_serial.c b/src/superio/smsc/lpc47n227/early_serial.c index 4aea7c5..64a6d84 100644 --- a/src/superio/smsc/lpc47n227/early_serial.c +++ b/src/superio/smsc/lpc47n227/early_serial.c @@ -23,13 +23,13 @@ #include <arch/io.h> #include "lpc47n227.h"
-static void pnp_enter_conf_state(device_t dev) +static void pnp_enter_conf_state(pnp_devfn_t dev) { u16 port = dev >> 8; outb(0x55, port); }
-static void pnp_exit_conf_state(device_t dev) +static void pnp_exit_conf_state(pnp_devfn_t dev) { u16 port = dev >> 8; outb(0xaa, port); @@ -41,7 +41,7 @@ static void pnp_exit_conf_state(device_t dev) * @param dev High 8 bits = Super I/O port, low 8 bits = logical device number. * @param iobase Base I/O port for the logical device. */ -static void lpc47n227_pnp_set_iobase(device_t dev, u16 iobase) +static void lpc47n227_pnp_set_iobase(pnp_devfn_t dev, u16 iobase) { /* LPC47N227 requires base ports to be a multiple of 4. */ /* it's not very useful to do an ASSERT here: if it trips, @@ -76,7 +76,7 @@ static void lpc47n227_pnp_set_iobase(device_t dev, u16 iobase) * @param dev High 8 bits = Super I/O port, low 8 bits = logical device number. * @param enable 0 to disable, anythig else to enable. */ -static void lpc47n227_pnp_set_enable(device_t dev, int enable) +static void lpc47n227_pnp_set_enable(pnp_devfn_t dev, int enable) { u8 power_register = 0, power_mask = 0, current_power, new_power;
@@ -111,7 +111,7 @@ static void lpc47n227_pnp_set_enable(device_t dev, int enable) * @param dev High 8 bits = Super I/O port, low 8 bits = logical device number. * @param iobase Processor I/O port address to assign to this serial device. */ -static void lpc47n227_enable_serial(device_t dev, u16 iobase) +static void lpc47n227_enable_serial(pnp_devfn_t dev, u16 iobase) { /* * NOTE: Cannot use pnp_set_XXX() here because they assume chip diff --git a/src/superio/smsc/sch4037/sch4037_early_init.c b/src/superio/smsc/sch4037/sch4037_early_init.c index 29517ed..267e0f7 100644 --- a/src/superio/smsc/sch4037/sch4037_early_init.c +++ b/src/superio/smsc/sch4037/sch4037_early_init.c @@ -21,13 +21,13 @@ #include <arch/io.h> #include "sch4037.h"
-static inline void pnp_enter_conf_state(device_t dev) +static inline void pnp_enter_conf_state(pnp_devfn_t dev) { unsigned port = dev>>8; outb(0x55, port); }
-static void pnp_exit_conf_state(device_t dev) +static void pnp_exit_conf_state(pnp_devfn_t dev) { unsigned port = dev>>8; outb(0xaa, port); diff --git a/src/superio/smsc/sio1036/sio1036_early_init.c b/src/superio/smsc/sio1036/sio1036_early_init.c index 52232a5..0f1fd4c 100644 --- a/src/superio/smsc/sio1036/sio1036_early_init.c +++ b/src/superio/smsc/sio1036/sio1036_early_init.c @@ -25,13 +25,13 @@ #ifndef CONFIG_TTYS0_BASE #define CONFIG_TTYS0_BASE 0x3F8 #endif -static inline void sio1036_enter_conf_state(device_t dev) +static inline void sio1036_enter_conf_state(pnp_devfn_t dev) { unsigned port = dev>>8; outb(0x55, port); }
-static inline void sio1036_exit_conf_state(device_t dev) +static inline void sio1036_exit_conf_state(pnp_devfn_t dev) { unsigned port = dev>>8; outb(0xaa, port); diff --git a/src/superio/smsc/smscsuperio/early_serial.c b/src/superio/smsc/smscsuperio/early_serial.c index e2eea6d..c058ef5 100644 --- a/src/superio/smsc/smscsuperio/early_serial.c +++ b/src/superio/smsc/smscsuperio/early_serial.c @@ -29,14 +29,14 @@ #define SMSC_EXIT_KEY 0xAA
/* Enable configuration: pass entry key '0x87' into index port dev. */ -static void pnp_enter_conf_state(device_t dev) +static void pnp_enter_conf_state(pnp_devfn_t dev) { u16 port = dev >> 8; outb(SMSC_ENTRY_KEY, port); }
/* Disable configuration: pass exit key '0xAA' into index port dev. */ -static void pnp_exit_conf_state(device_t dev) +static void pnp_exit_conf_state(pnp_devfn_t dev) { u16 port = dev >> 8; outb(SMSC_EXIT_KEY, port); @@ -49,7 +49,7 @@ static void pnp_exit_conf_state(device_t dev) * @param dev The device to use. * @param iobase The I/O base of the serial port (usually 0x3f8/0x2f8). */ -void smscsuperio_enable_serial(device_t dev, u16 iobase) +void smscsuperio_enable_serial(pnp_devfn_t dev, u16 iobase) { pnp_enter_conf_state(dev); pnp_set_logical_device(dev); diff --git a/src/superio/smsc/smscsuperio/smscsuperio.h b/src/superio/smsc/smscsuperio/smscsuperio.h index 60a58e6..8a761ba 100644 --- a/src/superio/smsc/smscsuperio/smscsuperio.h +++ b/src/superio/smsc/smscsuperio/smscsuperio.h @@ -30,6 +30,6 @@ #define SMSCSUPERIO_SP1 4 /* Com1 */ #define SMSCSUPERIO_SP2 5 /* Com2 */
-void smscsuperio_enable_serial(device_t dev, u16 iobase); +void smscsuperio_enable_serial(pnp_devfn_t dev, u16 iobase);
#endif /* SUPERIO_SMSC_SMSCSUPERIO_H */ diff --git a/src/superio/winbond/common/early_serial.c b/src/superio/winbond/common/early_serial.c index 747cc45..fd51cd5 100644 --- a/src/superio/winbond/common/early_serial.c +++ b/src/superio/winbond/common/early_serial.c @@ -46,7 +46,7 @@ #define WINBOND_EXIT_KEY 0xAA
/* Enable configuration: pass entry key '0x87' into index port dev. */ -static void pnp_enter_conf_state(device_t dev) +static void pnp_enter_conf_state(pnp_devfn_t dev) { u16 port = dev >> 8; outb(WINBOND_ENTRY_KEY, port); @@ -54,14 +54,14 @@ static void pnp_enter_conf_state(device_t dev) }
/* Disable configuration: pass exit key '0xAA' into index port dev. */ -static void pnp_exit_conf_state(device_t dev) +static void pnp_exit_conf_state(pnp_devfn_t dev) { u16 port = dev >> 8; outb(WINBOND_EXIT_KEY, port); }
/* Bring up early serial debugging output before the RAM is initialized. */ -void winbond_enable_serial(device_t dev, u16 iobase) +void winbond_enable_serial(pnp_devfn_t dev, u16 iobase) { pnp_enter_conf_state(dev); pnp_set_logical_device(dev); diff --git a/src/superio/winbond/common/winbond.h b/src/superio/winbond/common/winbond.h index 20eefc8..0f937c1 100644 --- a/src/superio/winbond/common/winbond.h +++ b/src/superio/winbond/common/winbond.h @@ -24,6 +24,6 @@ #include <arch/io.h> #include <stdint.h>
-void winbond_enable_serial(device_t dev, u16 iobase); +void winbond_enable_serial(pnp_devfn_t dev, u16 iobase);
#endif /* SUPERIO_WINBOND_COMMON_ROMSTAGE_H */ diff --git a/src/superio/winbond/w83627dhg/early_serial.c b/src/superio/winbond/w83627dhg/early_serial.c index 67aaa93..83f8e34 100644 --- a/src/superio/winbond/w83627dhg/early_serial.c +++ b/src/superio/winbond/w83627dhg/early_serial.c @@ -24,14 +24,14 @@ #include <stdint.h> #include "w83627dhg.h"
-void pnp_enter_ext_func_mode(device_t dev) +void pnp_enter_ext_func_mode(pnp_devfn_t dev) { u16 port = dev >> 8; outb(0x87, port); outb(0x87, port); }
-void pnp_exit_ext_func_mode(device_t dev) +void pnp_exit_ext_func_mode(pnp_devfn_t dev) { u16 port = dev >> 8; outb(0xaa, port); @@ -42,7 +42,7 @@ void pnp_exit_ext_func_mode(device_t dev) * {Pin 89, Pin 90} function can be selected as {GP33, GP32}, or * {RSTOUT3#, RSTOUT2#} or {SDA, SCL} */ -void w83627dhg_enable_i2c(device_t dev) +void w83627dhg_enable_i2c(pnp_devfn_t dev) { u8 val;
@@ -56,7 +56,7 @@ void w83627dhg_enable_i2c(device_t dev) pnp_exit_ext_func_mode(dev); }
-void w83627dhg_set_clksel_48(device_t dev) +void w83627dhg_set_clksel_48(pnp_devfn_t dev) { u8 reg8;
diff --git a/src/superio/winbond/w83627dhg/w83627dhg.h b/src/superio/winbond/w83627dhg/w83627dhg.h index 08ea04f..c4ead34 100644 --- a/src/superio/winbond/w83627dhg/w83627dhg.h +++ b/src/superio/winbond/w83627dhg/w83627dhg.h @@ -52,9 +52,9 @@
/* Note: There is no GPIO1 on the W83627DHG as per datasheet. */
-void pnp_enter_ext_func_mode(device_t dev); -void pnp_exit_ext_func_mode(device_t dev); -void w83627dhg_enable_i2c(device_t dev); -void w83627dhg_set_clksel_48(device_t dev); +void pnp_enter_ext_func_mode(pnp_devfn_t dev); +void pnp_exit_ext_func_mode(pnp_devfn_t dev); +void w83627dhg_enable_i2c(pnp_devfn_t dev); +void w83627dhg_set_clksel_48(pnp_devfn_t dev);
#endif /* SUPERIO_WINBOND_W83627DHG_H */ diff --git a/src/superio/winbond/w83627ehg/early_serial.c b/src/superio/winbond/w83627ehg/early_serial.c index 346d6cf..e052863 100644 --- a/src/superio/winbond/w83627ehg/early_serial.c +++ b/src/superio/winbond/w83627ehg/early_serial.c @@ -23,14 +23,14 @@ #include <device/pnp.h> #include "w83627ehg.h"
-void pnp_enter_ext_func_mode(device_t dev) +void pnp_enter_ext_func_mode(pnp_devfn_t dev) { u16 port = dev >> 8; outb(0x87, port); outb(0x87, port); }
-void pnp_exit_ext_func_mode(device_t dev) +void pnp_exit_ext_func_mode(pnp_devfn_t dev) { u16 port = dev >> 8; outb(0xaa, port); diff --git a/src/superio/winbond/w83627ehg/w83627ehg.h b/src/superio/winbond/w83627ehg/w83627ehg.h index 221de7b..3d6f56f 100644 --- a/src/superio/winbond/w83627ehg/w83627ehg.h +++ b/src/superio/winbond/w83627ehg/w83627ehg.h @@ -54,7 +54,7 @@ #define W83627EHG_GPIO4 ((2 << 8) | W83627EHG_GPIO_SUSLED_V) #define W83627EHG_GPIO5 ((3 << 8) | W83627EHG_GPIO_SUSLED_V)
-void pnp_enter_ext_func_mode(device_t dev); -void pnp_exit_ext_func_mode(device_t dev); +void pnp_enter_ext_func_mode(pnp_devfn_t dev); +void pnp_exit_ext_func_mode(pnp_devfn_t dev);
#endif /* SUPERIO_WINBOND_W83627EHG_H */ diff --git a/src/superio/winbond/w83627hf/early_serial.c b/src/superio/winbond/w83627hf/early_serial.c index bc251a6..694a3fe 100644 --- a/src/superio/winbond/w83627hf/early_serial.c +++ b/src/superio/winbond/w83627hf/early_serial.c @@ -24,14 +24,14 @@ #include <arch/io.h> #include "w83627hf.h"
-static void pnp_enter_ext_func_mode(device_t dev) +static void pnp_enter_ext_func_mode(pnp_devfn_t dev) { u16 port = dev >> 8; outb(0x87, port); outb(0x87, port); }
-static void pnp_exit_ext_func_mode(device_t dev) +static void pnp_exit_ext_func_mode(pnp_devfn_t dev) { u16 port = dev >> 8; outb(0xaa, port); @@ -49,7 +49,7 @@ static void pnp_exit_ext_func_mode(device_t dev) * XXX: ROMCC - everything is inlined, no forwarding function prototypes * declarations are accepted. */ -void w83627hf_enable_serial(device_t dev, u16 iobase) +void w83627hf_enable_serial(pnp_devfn_t dev, u16 iobase) { pnp_enter_ext_func_mode(dev); pnp_set_logical_device(dev); @@ -59,7 +59,7 @@ void w83627hf_enable_serial(device_t dev, u16 iobase) pnp_exit_ext_func_mode(dev); }
-void w83627hf_set_clksel_48(device_t dev) +void w83627hf_set_clksel_48(pnp_devfn_t dev) { u8 reg8;
diff --git a/src/superio/winbond/w83627hf/w83627hf.h b/src/superio/winbond/w83627hf/w83627hf.h index bf7186e..6eeb62b 100644 --- a/src/superio/winbond/w83627hf/w83627hf.h +++ b/src/superio/winbond/w83627hf/w83627hf.h @@ -115,7 +115,7 @@
#include <arch/io.h>
-void w83627hf_set_clksel_48(device_t dev); -void w83627hf_enable_serial(device_t dev, u16 iobase); +void w83627hf_set_clksel_48(pnp_devfn_t dev); +void w83627hf_enable_serial(pnp_devfn_t dev, u16 iobase);
#endif /* SUPERIO_WINBOND_W83627HF_H */ diff --git a/src/superio/winbond/w83627thg/w83627thg.h b/src/superio/winbond/w83627thg/w83627thg.h index ec857d3..8d85379 100644 --- a/src/superio/winbond/w83627thg/w83627thg.h +++ b/src/superio/winbond/w83627thg/w83627thg.h @@ -34,9 +34,9 @@ #define W83627THG_ACPI 10 #define W83627THG_HWM 11 /* Hardware monitor */
-void pnp_enter_ext_func_mode(device_t dev); -void pnp_exit_ext_func_mode(device_t dev); +void pnp_enter_ext_func_mode(pnp_devfn_t dev); +void pnp_exit_ext_func_mode(pnp_devfn_t dev);
-void w83627thg_set_clksel_48(device_t dev); +void w83627thg_set_clksel_48(pnp_devfn_t dev);
#endif /* SUPERIO_WINBOND_W83627THG_W83627THG_H */ diff --git a/src/superio/winbond/w83697hf/early_serial.c b/src/superio/winbond/w83697hf/early_serial.c index 6c00b27..515fee9 100644 --- a/src/superio/winbond/w83697hf/early_serial.c +++ b/src/superio/winbond/w83697hf/early_serial.c @@ -22,20 +22,20 @@ #include <device/pnp_def.h> #include "w83697hf.h"
-static void pnp_enter_ext_func_mode(device_t dev) +static void pnp_enter_ext_func_mode(pnp_devfn_t dev) { u16 port = dev >> 8; outb(0x87, port); outb(0x87, port); }
-static void pnp_exit_ext_func_mode(device_t dev) +static void pnp_exit_ext_func_mode(pnp_devfn_t dev) { u16 port = dev >> 8; outb(0xaa, port); }
-void w83697hf_set_clksel_48(device_t dev) +void w83697hf_set_clksel_48(pnp_devfn_t dev) { u8 reg8;
@@ -47,7 +47,7 @@ void w83697hf_set_clksel_48(device_t dev) }
/* Depreciated, use winbond_enable_serial() */ -void w83697hf_enable_serial(device_t dev, u16 iobase) +void w83697hf_enable_serial(pnp_devfn_t dev, u16 iobase) { pnp_enter_ext_func_mode(dev); pnp_set_logical_device(dev); diff --git a/src/superio/winbond/w83697hf/w83697hf.h b/src/superio/winbond/w83697hf/w83697hf.h index f711786..3bd1f44 100644 --- a/src/superio/winbond/w83697hf/w83697hf.h +++ b/src/superio/winbond/w83697hf/w83697hf.h @@ -34,9 +34,9 @@ #define W83697HF_ACPI 10 /* ACPI */ #define W83697HF_HWM 11 /* Hardware monitor */
-void w83697hf_set_clksel_48(device_t); +void w83697hf_set_clksel_48(pnp_devfn_t);
/* Depreciated, use winbond_enable_serial() */ -void w83697hf_enable_serial(device_t dev, u16 iobase); +void w83697hf_enable_serial(pnp_devfn_t dev, u16 iobase);
#endif /* SUPERIO_WINBOND_W83697HF_H */ diff --git a/src/superio/winbond/w83977f/early_serial.c b/src/superio/winbond/w83977f/early_serial.c index c572dcb..9b5785d 100644 --- a/src/superio/winbond/w83977f/early_serial.c +++ b/src/superio/winbond/w83977f/early_serial.c @@ -21,20 +21,20 @@ #include <arch/io.h> #include "w83977f.h"
-static void pnp_enter_ext_func_mode(device_t dev) +static void pnp_enter_ext_func_mode(pnp_devfn_t dev) { u16 port = dev >> 8; outb(0x87, port); outb(0x87, port); }
-static void pnp_exit_ext_func_mode(device_t dev) +static void pnp_exit_ext_func_mode(pnp_devfn_t dev) { u16 port = dev >> 8; outb(0xaa, port); }
-static void w83977f_enable_serial(device_t dev, u16 iobase) +static void w83977f_enable_serial(pnp_devfn_t dev, u16 iobase) { pnp_enter_ext_func_mode(dev); pnp_set_logical_device(dev); diff --git a/src/superio/winbond/w83977tf/early_serial.c b/src/superio/winbond/w83977tf/early_serial.c index c016515..866d9f2 100644 --- a/src/superio/winbond/w83977tf/early_serial.c +++ b/src/superio/winbond/w83977tf/early_serial.c @@ -23,20 +23,20 @@ #include <arch/io.h> #include "w83977tf.h"
-static void pnp_enter_ext_func_mode(device_t dev) +static void pnp_enter_ext_func_mode(pnp_devfn_t dev) { u16 port = dev >> 8; outb(0x87, port); outb(0x87, port); }
-static void pnp_exit_ext_func_mode(device_t dev) +static void pnp_exit_ext_func_mode(pnp_devfn_t dev) { u16 port = dev >> 8; outb(0xaa, port); }
-static void w83977tf_enable_serial(device_t dev, u16 iobase) +static void w83977tf_enable_serial(pnp_devfn_t dev, u16 iobase) { pnp_enter_ext_func_mode(dev); pnp_set_logical_device(dev);