Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32175 )
Change subject: soc/intel/cannonlake: Correct the GPE DWx mapping for GPIO groups
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Patch Set 3:
(1 comment)
https://review.coreboot.org/#/c/32175/1//COMMIT_MSG
Commit Message:
https://review.coreboot.org/#/c/32175/1//COMMIT_MSG@14
PS1, Line 14: Verified the GPIO MISCFG is getting set as per updated map.
I checked for GPE_STS for touchpad on hatch , verified STS set for A21(DW0) and D21(DW2) wake instan […]
TPM was working fine earlier as well so we were just getting lucky that DW1_21 was set all the time and so it never caused timeouts?
Are you able to clear DW1_21 in GPE_STS and does that take effect? I think you had reported in another issue that DW1_21 stays set all the time?
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Gerrit-Project: coreboot
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