[coreboot-gerrit] [S] Change in coreboot[main]: WIP:soc/amd/mendocino: Add DBG2

[Felix Held (Code Review)]

Attention is currently required from: Bao Zheng, Cliff Huang, Fred Reitberger, Jason Glenesk, Lance Zhao, Matt DeVillier, Tim Wawrzynczak, Zheng Bao.

Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79174?usp=email )

Change subject: WIP:soc/amd/mendocino: Add DBG2
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Patch Set 2:

(4 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/79174/comment/8d5f5cd8_1d18e93e :
PS2, Line 9: 240426142
bug id doesn't seem to be related to the patch

File src/acpi/acpi.c:

https://review.coreboot.org/c/coreboot/+/79174/comment/53e1f451_ec7a00a8 :
PS2, Line 899: 16550
to me this name is a bit misleading; i'd expect io-space and byte size access from the name. i'd use acpi_16550_mmio32_write_dbg2_uart as function name instead which makes it clearer what type of UART this is for

File src/soc/amd/mendocino/agesa_acpi.c:

https://review.coreboot.org/c/coreboot/+/79174/comment/85312243_1ab43581 :
PS2, Line 30: Add table
DBG2?

https://review.coreboot.org/c/coreboot/+/79174/comment/3cae31b4_15b6f89d :
PS2, Line 31: 	current = acpi_16550_write_dbg2_uart(rsdp, current, 0xfedc9000, NULL);
shouldn't this call be put into an if CONFIG(AMD_SOC_CONSOLE_UART) block? i agree with Raul that the base address shouldn't be fixed here and the one from the debug uart selected in coreboot should be used