Nico Huber has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/52187 )
Change subject: [TEST] sb/amd/hudson: Make SPI available in all stages ......................................................................
[TEST] sb/amd/hudson: Make SPI available in all stages
Change-Id: Ie1ac485923aaa50e8a0024c12755909c0cb83214 Signed-off-by: Nico Huber nico.huber@secunet.com --- M src/southbridge/amd/agesa/hudson/Makefile.inc M src/southbridge/amd/agesa/hudson/spi.c 2 files changed, 3 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/52187/1
diff --git a/src/southbridge/amd/agesa/hudson/Makefile.inc b/src/southbridge/amd/agesa/hudson/Makefile.inc index b8eb5b9..8da883e 100644 --- a/src/southbridge/amd/agesa/hudson/Makefile.inc +++ b/src/southbridge/amd/agesa/hudson/Makefile.inc @@ -24,7 +24,7 @@ ramstage-y += enable_usbdebug.c romstage-y += early_setup.c
-ramstage-$(CONFIG_SPI_FLASH) += spi.c +all-$(CONFIG_SPI_FLASH) += spi.c ramstage-y += resume.c ramtop.c
romstage-y += ramtop.c diff --git a/src/southbridge/amd/agesa/hudson/spi.c b/src/southbridge/amd/agesa/hudson/spi.c index b2f9ff2..e222ce7 100644 --- a/src/southbridge/amd/agesa/hudson/spi.c +++ b/src/southbridge/amd/agesa/hudson/spi.c @@ -66,10 +66,8 @@
void spi_init(void) { - struct device *dev; - - dev = pcidev_on_root(0x14, 3); - spibar = pci_read_config32(dev, 0xA0) & ~0x1F; + const pci_devfn_t dev = PCI_DEV(0, 0x14, 3); + spibar = pci_s_read_config32(dev, 0xA0) & ~0x1F; }
static int spi_ctrlr_xfer(const struct spi_slave *slave, const void *dout,