build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32381 )
Change subject: soc/intel/braswell: add default option to use public FSP ......................................................................
Patch Set 1:
(2 comments)
https://review.coreboot.org/#/c/32381/1/src/mainboard/intel/strago/ramstage.... File src/mainboard/intel/strago/ramstage.c:
https://review.coreboot.org/#/c/32381/1/src/mainboard/intel/strago/ramstage.... PS1, Line 31: if (config->D0Usb2Port0PerPortRXISet != 0) please, no spaces at the start of a line
https://review.coreboot.org/#/c/32381/1/src/mainboard/intel/strago/ramstage.... PS1, Line 31: if (config->D0Usb2Port0PerPortRXISet != 0) suspect code indent for conditional statements (4, 16)