Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38541 )
Change subject: ec/google/chromeec: Add SSDT generator for ChromeOS EC ......................................................................
Patch Set 11:
(2 comments)
https://review.coreboot.org/c/coreboot/+/38541/11/src/ec/google/chromeec/ec.... File src/ec/google/chromeec/ec.h:
https://review.coreboot.org/c/coreboot/+/38541/11/src/ec/google/chromeec/ec.... PS11, Line 342: board_get_usb_typec_port_paths
Do we really need this? Just another thing that the mainboard needs to provide. […]
I hear you, I was trying to minimize the amount of manual work for new boards to implement this. I'll give it another think and see if I can come up with something more automatic based on that info.
https://review.coreboot.org/c/coreboot/+/38541/11/src/ec/google/chromeec/ec_... File src/ec/google/chromeec/ec_chip.c:
https://review.coreboot.org/c/coreboot/+/38541/11/src/ec/google/chromeec/ec_... PS11, Line 125: #if CONFIG(SOC_INTEL_COMMON_BLOCK_XHCI)
Instead of having this block here, what do you think about having a callback into the SoC to simply […]
Ah, that sounds like a good idea. Then this can go in intel common XHCI block.