Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38388 )
Change subject: soc/intel/{apl,cnl,icl,skl,tgl}: Add comments for above 4GB mem range macro ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/38388/1/src/soc/intel/apollolake/in... File src/soc/intel/apollolake/include/soc/iomap.h:
https://review.coreboot.org/c/coreboot/+/38388/1/src/soc/intel/apollolake/in... PS1, Line 68: * Length is 2^36 = 64 GB.
As I understand it, the upper DRAM range goes from 4GiB till TOUUD. […]
Right, after reading doc 326769, I think I understand now.
There are three chunks of usable DRAM (main memory): 1: DRAM below 4GB, host sees it below 4GB: Main memory below 4GB 2: DRAM above 4GB, host sees it above 4GB: Main memory above 4GB 3: DRAM below 4GB, host sees it above 4GB: Reclaimed / remapped memory
Reclaiming / remapping allows using the memory below 4GB that ends up hidden behind the PCI config space. When decoding Host --> DRAM, the MC hardware does something like this:
if (remap_base <= host_addr && host_addr <= remap_limit) { phys_addr = host_addr - remap_base + (4GB - (remap_limit - remap_base));
/* Equivalent expression */ phys_addr = host_addr + 4GB - remap_limit; }
Using the register names, this means that:
Host [REMAPBASE..REMAPLIMIT] --> DRAM [TOLUD..4GB]
The doc describes the memory map programming steps:
1. Determine TOM: TOM = installed DRAM size. Can be derived from the values of MCHBAR MAD_DIMM_CHx registers.
2. Determine TOM minus Intel ME stolen size This is usually done by asking the ME how much memory it wants. It is then programmed into MESEG_BASE and MESEG_MASK.
3. Determine MMIO allocation This is the size of the MMIO window below 4GB. It can be fixed to a large enough value when the hardware supports remapping.
4. Determine TOLUD TOLUD = 4GB - MMIO window size.
5. Determine graphics stolen base BDSM = TOLUD - GFX data stolen memory size. This depends on the value of the GGC register.
6. Determine graphics GTT stolen base BGSM = BDSM - GFX GTT stolen memory size. This also depends on the GGC register values.
7. Determine TSEG base TSEG base = BGSM - TSEG size. It is usually 8MB, but can be larger if also allocating IEDRAM (Intel Enhanced Debug).
8. Determine remap base/limit If not remapping, then REMAPBASE and REMAPLIMIT should be left at their default values. If remapping, then: REMAPBASE = MAX(4GB, TOM - ME UMA size) REMAPLIMIT = (TOM - ME UMA size) + 4GB - TOLUD - 1MB
Note that the 1MB is because of granularity. On Westmere, the granularity is 64 MiB.
9. Determine TOUUD It is right above REMAPLIMIT: TOUUD = REMAPLIMIT + 1
Then, TOUUD is actually above the remapped range.