[coreboot-gerrit] Change in coreboot[master]: superio/nuvoton: Only set bit 7 of global CR 0x2a for COM A

[Paul Menzel (Code Review)]

Hello Felix Held,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/46286

to look at the new patch set (#2).

Change subject: superio/nuvoton: Only set bit 7 of global CR 0x2a for COM A
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superio/nuvoton: Only set bit 7 of global CR 0x2a for COM A

Currently, when selecting SUPERIO_NUVOTON_NCT*_COM_A, the whole global
control register 0x2a is written to 0x40. CR 0x2a defaults to 0xc0, so
indeed bit 7 is cleared, but the device early init code might have set
other bits in that control register, so setting it to 0x40 might
override already set bits. So, only clear bit 7 and leave the other bits
untouched.

Fixes: f95daa510d ("superio/nuvoton: Add back Nuvoton NCT6776 support")
Change-Id: I9ded9dab3985c4c8e5c45af354ef44af482e18c2
Signed-off-by: Paul Menzel 
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M src/superio/nuvoton/common/early_serial.c
1 file changed, 1 insertion(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/46286/2