HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/50186 )
Change subject: src: Remove useless comments in "includes" lines ......................................................................
src: Remove useless comments in "includes" lines
Change-Id: Ide5673dc99688422c5078c8c28ca5935fd39c854 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/arch/arm/include/armv7/arch/mmio.h M src/drivers/intel/dptf/chip.h M src/drivers/intel/fsp1_1/include/fsp/romstage.h M src/drivers/intel/fsp1_1/raminit.c M src/lib/ramtest.c M src/mainboard/amd/union_station/mainboard.c M src/mainboard/google/kahlee/variants/baseboard/memory.c M src/mainboard/lippert/frontrunner-af/sema.c M src/northbridge/amd/agesa/family14/dimmSpd.c M src/soc/nvidia/tegra124/include/soc/gpio.h M src/southbridge/amd/cimx/sb800/SBPLATFORM.h 11 files changed, 12 insertions(+), 12 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/50186/1
diff --git a/src/arch/arm/include/armv7/arch/mmio.h b/src/arch/arm/include/armv7/arch/mmio.h index 173a0a3..45868b5 100644 --- a/src/arch/arm/include/armv7/arch/mmio.h +++ b/src/arch/arm/include/armv7/arch/mmio.h @@ -7,7 +7,7 @@ #ifndef __ARCH_MMIO_H__ #define __ARCH_MMIO_H__
-#include <arch/cache.h> /* for dmb() */ +#include <arch/cache.h> #include <endian.h> #include <stdint.h>
diff --git a/src/drivers/intel/dptf/chip.h b/src/drivers/intel/dptf/chip.h index db4c3ae..5408d9e 100644 --- a/src/drivers/intel/dptf/chip.h +++ b/src/drivers/intel/dptf/chip.h @@ -4,7 +4,7 @@ #define _DRIVERS_INTEL_DPTF_CHIP_H_
#include <acpi/acpigen_dptf.h> -#include <timer.h> /* for MSECS_PER_SEC */ +#include <timer.h>
#define DPTF_PASSIVE(src, tgt, tmp, prd) \ {.source = DPTF_##src, .target = DPTF_##tgt, .temp = (tmp), .period = (prd)} diff --git a/src/drivers/intel/fsp1_1/include/fsp/romstage.h b/src/drivers/intel/fsp1_1/include/fsp/romstage.h index c452f0b..23eadfa 100644 --- a/src/drivers/intel/fsp1_1/include/fsp/romstage.h +++ b/src/drivers/intel/fsp1_1/include/fsp/romstage.h @@ -9,7 +9,7 @@ #include <fsp/car.h> #include <fsp/util.h> #include <soc/intel/common/mma.h> -#include <soc/pm.h> /* chip_power_state */ +#include <soc/pm.h>
struct romstage_params { uint32_t fsp_version; diff --git a/src/drivers/intel/fsp1_1/raminit.c b/src/drivers/intel/fsp1_1/raminit.c index dd08d77..4c468e5 100644 --- a/src/drivers/intel/fsp1_1/raminit.c +++ b/src/drivers/intel/fsp1_1/raminit.c @@ -8,7 +8,7 @@ #include <cpu/x86/smm.h> #include <fsp/romstage.h> #include <fsp/util.h> -#include <lib.h> /* hexdump */ +#include <lib.h> #include <string.h> #include <timestamp.h>
diff --git a/src/lib/ramtest.c b/src/lib/ramtest.c index 224393f..45178a7 100644 --- a/src/lib/ramtest.c +++ b/src/lib/ramtest.c @@ -1,5 +1,5 @@ #include <stdint.h> -#include <lib.h> /* Prototypes */ +#include <lib.h> #include <console/console.h> #include <device/mmio.h>
diff --git a/src/mainboard/amd/union_station/mainboard.c b/src/mainboard/amd/union_station/mainboard.c index 88ba111..4b6f9a1 100644 --- a/src/mainboard/amd/union_station/mainboard.c +++ b/src/mainboard/amd/union_station/mainboard.c @@ -3,7 +3,7 @@ #include <amdblocks/acpimmio.h> #include <console/console.h> #include <device/device.h> -#include <southbridge/amd/cimx/sb800/SBPLATFORM.h> /* Platform Specific Definitions */ +#include <southbridge/amd/cimx/sb800/SBPLATFORM.h>
/********************************************** * Enable the dedicated functions of the board. diff --git a/src/mainboard/google/kahlee/variants/baseboard/memory.c b/src/mainboard/google/kahlee/variants/baseboard/memory.c index 8664560..d3d81fd 100644 --- a/src/mainboard/google/kahlee/variants/baseboard/memory.c +++ b/src/mainboard/google/kahlee/variants/baseboard/memory.c @@ -2,7 +2,7 @@
#include <baseboard/variants.h> #include <console/console.h> -#include <gpio.h> /* src/include/gpio.h */ +#include <gpio.h> #include <spd_bin.h> #include <variant/gpio.h> #include <amdblocks/dimm_spd.h> diff --git a/src/mainboard/lippert/frontrunner-af/sema.c b/src/mainboard/lippert/frontrunner-af/sema.c index fb8e6ef..e80cc12 100644 --- a/src/mainboard/lippert/frontrunner-af/sema.c +++ b/src/mainboard/lippert/frontrunner-af/sema.c @@ -4,7 +4,7 @@ #include <console/console.h> #include <device/device.h> #include <delay.h> -#include <OEM.h> /* SMBUS0_BASE_ADDRESS */ +#include <OEM.h>
#include <Porting.h> #include <AGESA.h> diff --git a/src/northbridge/amd/agesa/family14/dimmSpd.c b/src/northbridge/amd/agesa/family14/dimmSpd.c index 3ce84a4..d43e6a1 100644 --- a/src/northbridge/amd/agesa/family14/dimmSpd.c +++ b/src/northbridge/amd/agesa/family14/dimmSpd.c @@ -2,7 +2,7 @@
#include <device/pci_def.h> #include <device/device.h> -#include <OEM.h> /* SMBUS0_BASE_ADDRESS */ +#include <OEM.h>
/* warning: Porting.h includes an open #pragma pack(1) */ #include <Porting.h> diff --git a/src/soc/nvidia/tegra124/include/soc/gpio.h b/src/soc/nvidia/tegra124/include/soc/gpio.h index 6b66a98..48601dd 100644 --- a/src/soc/nvidia/tegra124/include/soc/gpio.h +++ b/src/soc/nvidia/tegra124/include/soc/gpio.h @@ -4,7 +4,7 @@ #define __SOC_NVIDIA_TEGRA124_GPIO_H__
#include <soc/nvidia/tegra/gpio.h> -#include <soc/pinmux.h> /* for pinmux constants in GPIO macro */ +#include <soc/pinmux.h>
/* GPIO index constants. */
diff --git a/src/southbridge/amd/cimx/sb800/SBPLATFORM.h b/src/southbridge/amd/cimx/sb800/SBPLATFORM.h index 99c7323..7600886 100644 --- a/src/southbridge/amd/cimx/sb800/SBPLATFORM.h +++ b/src/southbridge/amd/cimx/sb800/SBPLATFORM.h @@ -44,8 +44,8 @@ #include <SBDEF.h> #include <AMDSBLIB.h> #include <SBSUBFUN.h> -#include "platform_cfg.h" /* mainboard specific configuration */ -#include <OEM.h> /* platform default configuration */ +#include "platform_cfg.h" +#include <OEM.h> #include <AMD.h>
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