Kyösti Mälkki (kyosti.malkki@gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4525
-gerrit
commit 0090d27496f159074e116aa39928042b5794de06 Author: Kyösti Mälkki kyosti.malkki@gmail.com Date: Tue Dec 10 09:03:17 2013 +0200
AMD: Declare acpi_is_wakeup_early only once
Change-Id: I5314d76168c40a6327d4a9ac3b4f4fb05497d6fc Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- src/arch/x86/include/arch/acpi.h | 2 ++ src/cpu/amd/car/post_cache_as_ram.c | 1 + src/mainboard/amd/olivehill/romstage.c | 1 + src/mainboard/amd/parmer/romstage.c | 1 + src/mainboard/amd/persimmon/romstage.c | 1 + src/mainboard/amd/thatcher/romstage.c | 1 + src/mainboard/asrock/imb-a180/romstage.c | 1 + src/mainboard/asus/f2a85-m/romstage.c | 1 + src/mainboard/lippert/frontrunner-af/romstage.c | 1 + src/mainboard/lippert/toucan-af/romstage.c | 1 + src/mainboard/via/epia-m700/romstage.c | 1 + src/northbridge/amd/amdk8/raminit.c | 1 + src/southbridge/amd/agesa/hudson/hudson.h | 2 -- src/southbridge/amd/cimx/sb800/sb_cimx.h | 2 -- src/southbridge/amd/sb700/early_setup.c | 2 +- src/southbridge/amd/sb700/sb700.h | 4 ---- src/southbridge/amd/sb800/early_setup.c | 3 ++- src/southbridge/via/vt8237r/early_smbus.c | 2 +- 18 files changed, 17 insertions(+), 11 deletions(-)
diff --git a/src/arch/x86/include/arch/acpi.h b/src/arch/x86/include/arch/acpi.h index d73c046..6df3a18 100644 --- a/src/arch/x86/include/arch/acpi.h +++ b/src/arch/x86/include/arch/acpi.h @@ -567,6 +567,8 @@ void *acpi_get_wakeup_rsdp(void); void acpi_jump_to_wakeup(void *wakeup_addr);
int acpi_get_sleep_type(void); +int acpi_is_wakeup_early(void); + #else /* CONFIG_HAVE_ACPI_RESUME */ #define acpi_slp_type 0 #endif /* CONFIG_HAVE_ACPI_RESUME */ diff --git a/src/cpu/amd/car/post_cache_as_ram.c b/src/cpu/amd/car/post_cache_as_ram.c index 1669da7..860989e 100644 --- a/src/cpu/amd/car/post_cache_as_ram.c +++ b/src/cpu/amd/car/post_cache_as_ram.c @@ -6,6 +6,7 @@ #include <cpu/x86/mtrr.h> #include <cpu/amd/mtrr.h> #include <cpu/amd/car.h> +#include <arch/acpi.h> #include "cbmem.h" #include "cpu/amd/car/disable_cache_as_ram.c"
diff --git a/src/mainboard/amd/olivehill/romstage.c b/src/mainboard/amd/olivehill/romstage.c index 6422393..c62b2f7 100644 --- a/src/mainboard/amd/olivehill/romstage.c +++ b/src/mainboard/amd/olivehill/romstage.c @@ -22,6 +22,7 @@ #include <device/pci_def.h> #include <device/pci_ids.h> #include <arch/io.h> +#include <arch/acpi.h> #include <arch/stages.h> #include <device/pnp_def.h> #include <arch/cpu.h> diff --git a/src/mainboard/amd/parmer/romstage.c b/src/mainboard/amd/parmer/romstage.c index a5d041f..1b9a0bb 100644 --- a/src/mainboard/amd/parmer/romstage.c +++ b/src/mainboard/amd/parmer/romstage.c @@ -22,6 +22,7 @@ #include <device/pci_def.h> #include <device/pci_ids.h> #include <arch/io.h> +#include <arch/acpi.h> #include <arch/stages.h> #include <device/pnp_def.h> #include <arch/cpu.h> diff --git a/src/mainboard/amd/persimmon/romstage.c b/src/mainboard/amd/persimmon/romstage.c index dca0376..8263efe 100644 --- a/src/mainboard/amd/persimmon/romstage.c +++ b/src/mainboard/amd/persimmon/romstage.c @@ -22,6 +22,7 @@ #include <device/pci_def.h> #include <device/pci_ids.h> #include <arch/io.h> +#include <arch/acpi.h> #include <arch/stages.h> #include <device/pnp_def.h> #include <arch/cpu.h> diff --git a/src/mainboard/amd/thatcher/romstage.c b/src/mainboard/amd/thatcher/romstage.c index 9c3cf5b..1697054 100644 --- a/src/mainboard/amd/thatcher/romstage.c +++ b/src/mainboard/amd/thatcher/romstage.c @@ -22,6 +22,7 @@ #include <device/pci_def.h> #include <device/pci_ids.h> #include <arch/io.h> +#include <arch/acpi.h> #include <arch/stages.h> #include <device/pnp_def.h> #include <arch/cpu.h> diff --git a/src/mainboard/asrock/imb-a180/romstage.c b/src/mainboard/asrock/imb-a180/romstage.c index 59d95f9..69474e2 100644 --- a/src/mainboard/asrock/imb-a180/romstage.c +++ b/src/mainboard/asrock/imb-a180/romstage.c @@ -22,6 +22,7 @@ #include <device/pci_def.h> #include <device/pci_ids.h> #include <arch/io.h> +#include <arch/acpi.h> #include <arch/stages.h> #include <device/pnp_def.h> #include <arch/cpu.h> diff --git a/src/mainboard/asus/f2a85-m/romstage.c b/src/mainboard/asus/f2a85-m/romstage.c index 5b2088e..960258f 100644 --- a/src/mainboard/asus/f2a85-m/romstage.c +++ b/src/mainboard/asus/f2a85-m/romstage.c @@ -23,6 +23,7 @@ #include <device/pci_def.h> #include <device/pci_ids.h> #include <arch/io.h> +#include <arch/acpi.h> #include <arch/stages.h> #include <device/pnp_def.h> #include <arch/cpu.h> diff --git a/src/mainboard/lippert/frontrunner-af/romstage.c b/src/mainboard/lippert/frontrunner-af/romstage.c index b311a19..3dd79ba 100644 --- a/src/mainboard/lippert/frontrunner-af/romstage.c +++ b/src/mainboard/lippert/frontrunner-af/romstage.c @@ -22,6 +22,7 @@ #include <device/pci_def.h> #include <device/pci_ids.h> #include <arch/io.h> +#include <arch/acpi.h> #include <arch/stages.h> #include <device/pnp_def.h> #include <arch/cpu.h> diff --git a/src/mainboard/lippert/toucan-af/romstage.c b/src/mainboard/lippert/toucan-af/romstage.c index 43cf36f..ef1723e 100644 --- a/src/mainboard/lippert/toucan-af/romstage.c +++ b/src/mainboard/lippert/toucan-af/romstage.c @@ -22,6 +22,7 @@ #include <device/pci_def.h> #include <device/pci_ids.h> #include <arch/io.h> +#include <arch/acpi.h> #include <arch/stages.h> #include <device/pnp_def.h> #include <arch/cpu.h> diff --git a/src/mainboard/via/epia-m700/romstage.c b/src/mainboard/via/epia-m700/romstage.c index fda1bb0..e051cc0 100644 --- a/src/mainboard/via/epia-m700/romstage.c +++ b/src/mainboard/via/epia-m700/romstage.c @@ -28,6 +28,7 @@ #include <device/pci_def.h> #include <device/pci_ids.h> #include <arch/io.h> +#include <arch/acpi.h> #include <device/pnp_def.h> #include <arch/hlt.h> #include <console/console.h> diff --git a/src/northbridge/amd/amdk8/raminit.c b/src/northbridge/amd/amdk8/raminit.c index 371bac9..7d2ad0d 100644 --- a/src/northbridge/amd/amdk8/raminit.c +++ b/src/northbridge/amd/amdk8/raminit.c @@ -8,6 +8,7 @@ #include <cpu/x86/mtrr.h> #include <cpu/amd/mtrr.h> #include <stdlib.h> +#include <arch/acpi.h> #include <reset.h> #include "raminit.h" #include "amdk8.h" diff --git a/src/southbridge/amd/agesa/hudson/hudson.h b/src/southbridge/amd/agesa/hudson/hudson.h index e8f80aa..2b58659 100644 --- a/src/southbridge/amd/agesa/hudson/hudson.h +++ b/src/southbridge/amd/agesa/hudson/hudson.h @@ -65,8 +65,6 @@ void hudson_clk_output_48Mhz(void); int s3_save_nvram_early(u32 dword, int size, int nvram_pos); int s3_load_nvram_early(int size, u32 *old_dword, int nvram_pos);
-int acpi_is_wakeup_early(void); - #else void hudson_enable(device_t dev); void __attribute__((weak)) hudson_setup_sata_phys(struct device *dev); diff --git a/src/southbridge/amd/cimx/sb800/sb_cimx.h b/src/southbridge/amd/cimx/sb800/sb_cimx.h index 6267e1c..cd8c42b 100644 --- a/src/southbridge/amd/cimx/sb800/sb_cimx.h +++ b/src/southbridge/amd/cimx/sb800/sb_cimx.h @@ -32,8 +32,6 @@ void sb_Late_Post(void); void sb_Before_Pci_Restore_Init(void); void sb_After_Pci_Restore_Init(void);
-int acpi_is_wakeup_early(void); - /** * CIMX not set the clock to 48Mhz until sbBeforePciInit, * coreboot may need to set this even more earlier diff --git a/src/southbridge/amd/sb700/early_setup.c b/src/southbridge/amd/sb700/early_setup.c index ddba1a8..8ecf04d 100644 --- a/src/southbridge/amd/sb700/early_setup.c +++ b/src/southbridge/amd/sb700/early_setup.c @@ -22,12 +22,12 @@
#include <stdint.h> #include <arch/cpu.h> +#include <arch/acpi.h> #include <arch/io.h> #include <console/console.h> #include <cpu/x86/msr.h>
#include <reset.h> -#include <arch/cpu.h> #include <cbmem.h> #include "sb700.h" #include "smbus.h" diff --git a/src/southbridge/amd/sb700/sb700.h b/src/southbridge/amd/sb700/sb700.h index b70e395..2cbfdc9 100644 --- a/src/southbridge/amd/sb700/sb700.h +++ b/src/southbridge/amd/sb700/sb700.h @@ -75,10 +75,6 @@ void sb7xx_51xx_setup_sata_phys(struct device *dev);
#endif
-#if CONFIG_HAVE_ACPI_RESUME -int acpi_is_wakeup_early(void); -#endif - int s3_save_nvram_early(u32 dword, int size, int nvram_pos); int s3_load_nvram_early(int size, u32 *old_dword, int nvram_pos);
diff --git a/src/southbridge/amd/sb800/early_setup.c b/src/southbridge/amd/sb800/early_setup.c index 213cae9..2c12b39 100644 --- a/src/southbridge/amd/sb800/early_setup.c +++ b/src/southbridge/amd/sb800/early_setup.c @@ -22,6 +22,7 @@
#include <reset.h> #include <arch/cpu.h> +#include <arch/acpi.h> #include <cbmem.h> #include "sb800.h" #include "smbus.c" @@ -666,7 +667,7 @@ int s3_load_nvram_early(int size, u32 *old_dword, int nvram_pos) }
#if CONFIG_HAVE_ACPI_RESUME -static int acpi_is_wakeup_early(void) +int acpi_is_wakeup_early(void) { u16 tmp; tmp = inw(ACPI_PM1_CNT_BLK); diff --git a/src/southbridge/via/vt8237r/early_smbus.c b/src/southbridge/via/vt8237r/early_smbus.c index b41e1ad..58722b4 100644 --- a/src/southbridge/via/vt8237r/early_smbus.c +++ b/src/southbridge/via/vt8237r/early_smbus.c @@ -328,7 +328,7 @@ void enable_rom_decode(void) }
#if CONFIG_HAVE_ACPI_RESUME -static int acpi_is_wakeup_early(void) { +int acpi_is_wakeup_early(void) { device_t dev; u16 tmp;