[coreboot-gerrit] Change in coreboot[master]: soc/intel/coffeelake/romstage: Updated BoardType for RVP11

[Kin Wai Ng (Code Review)]

Hello Naresh Solanki, Subrata Banik, Balaji Manigandan, Aamir Bohra, Maulik V Vaghela, Rizwan Qureshi,

I'd like you to do a code review. Please visit

https://review.coreboot.org/25231

to review the following change.

Change subject: soc/intel/coffeelake/romstage: Updated BoardType for RVP11
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soc/intel/coffeelake/romstage: Updated BoardType for RVP11

Setting following BIOS MRC params showing BoardType=1.

Change-Id: I2d51249103d9be7fbecea051ffef05d6adc8d370
Signed-off-by: Ng Kin Wai 
---
M src/soc/intel/coffeelake/romstage/romstage.c
1 file changed, 1 insertion(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/25231/1

diff --git a/src/soc/intel/coffeelake/romstage/romstage.c b/src/soc/intel/coffeelake/romstage/romstage.c
old mode 100644
new mode 100755
index 8eb48fe..8068636
--- a/src/soc/intel/coffeelake/romstage/romstage.c
+++ b/src/soc/intel/coffeelake/romstage/romstage.c
@@ -155,7 +155,7 @@
    m_cfg->TsegSize = CONFIG_SMM_TSEG_SIZE;
    m_cfg->IedSize = CONFIG_IED_REGION_SIZE;
    m_cfg->SaGv = config->SaGv;
-	m_cfg->UserBd = BOARD_TYPE_ULT_ULX;
+	m_cfg->UserBd = BOARD_TYPE_DESKTOP;
    m_cfg->RMT = config->RMT;

for (i = 0; i < ARRAY_SIZE(config->PcieRpEnable); i++) {