Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39824 )
Change subject: soc/intel/jasperlake: Remove Tiger Lake SoC code from Jasper Lake
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Patch Set 3:
(2 comments)
https://review.coreboot.org/c/coreboot/+/39824/2/src/soc/intel/jasperlake/bo...
File src/soc/intel/jasperlake/bootblock/pch.c:
https://review.coreboot.org/c/coreboot/+/39824/2/src/soc/intel/jasperlake/bo...
PS2, Line 121: pmc_base_reg = get_pmc_reg_base();
Done, removed below check , since we are just doing a assignment above. […]
Sounds good. Thanks!
https://review.coreboot.org/c/coreboot/+/39824/2/src/soc/intel/jasperlake/bo...
File src/soc/intel/jasperlake/bootblock/report_platform.c:
https://review.coreboot.org/c/coreboot/+/39824/2/src/soc/intel/jasperlake/bo...
PS2, Line 52: Jasperlake Elkhartlake
This it not valid for JSL SOCs now. […]
I see this is removed from both TGL and JSL. Which one does it really belong to?
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Gerrit-Project: coreboot
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Gerrit-Change-Id: I44dc6bf55ca18a3f0c350f5c3e9fae2996958648
Gerrit-Change-Number: 39824
Gerrit-PatchSet: 3
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