Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/58345 )
Change subject: mb/google/guybrush/bootblock: add comment about LPC_LDRQ0_PU,PD_EN ......................................................................
mb/google/guybrush/bootblock: add comment about LPC_LDRQ0_PU,PD_EN
The definition of those bits changed between Picasso and Renoir/Cezanne so add a comment where those bit definitions are used as well.
Signed-off-by: Felix Held felix-coreboot@felixheld.de Change-Id: If1cf4b06fc35f94cbd482f2869fcc64739e7d272 --- M src/mainboard/google/guybrush/bootblock.c 1 file changed, 2 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/58345/1
diff --git a/src/mainboard/google/guybrush/bootblock.c b/src/mainboard/google/guybrush/bootblock.c index 4a0d384..83ac43a 100644 --- a/src/mainboard/google/guybrush/bootblock.c +++ b/src/mainboard/google/guybrush/bootblock.c @@ -34,6 +34,8 @@ size_t base_num_gpios, override_num_gpios; const struct soc_amd_gpio *base_gpios, *override_gpios;
+ /* Beware that the bit definitions for LPC_LDRQ0_PU_EN and LPC_LDRQ0_PD_EN are swapped + on Picasso and older compared to Renoir/Cezanne and newer */ dword = pci_read_config32(SOC_LPC_DEV, LPC_MISC_CONTROL_BITS); dword &= ~(LPC_LDRQ0_PU_EN | LPC_LDRQ1_EN | LPC_LDRQ0_EN); dword |= LPC_LDRQ0_PD_EN;