Patrick Georgi (pgeorgi@google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/16706
-gerrit
commit 83416c1c836006a9acf33dd9f37afe9650696f5e Author: Simon Glass sjg@chromium.org Date: Sat Aug 27 12:18:38 2016 -0600
arm64: Use 'payload' format for ATF instead of 'stage'
Switch the BL31 (ARM Trusted Firmware) format to payload so that it can have multiple independent segments. This also requires disabling the region check since SRAM is currently faulted by that check.
This has been tested with Rockchip's pending change:
https://chromium-review.googlesource.com/#/c/368592/3
with the patch mentioned on the bug at #13.
BUG=chrome-os-partner:56314 BRANCH=none TEST=boot on gru and see that BL31 loads and runs. Im not sure if it is correct though: CBFS: Locating 'fallback/payload' CBFS: Found @ offset 1b440 size 15a75 Loading segment from ROM address 0x0000000000100000 code (compression=1) New segment dstaddr 0x18104800 memsize 0x117fbe0 srcaddr 0x100038 filesize 0x15a3d Loading segment from ROM address 0x000000000010001c Entry Point 0x0000000018104800 Loading Segment: addr: 0x0000000018104800 memsz: 0x000000000117fbe0 filesz: 0x0000000000015a3d lb: [0x0000000000300000, 0x0000000000320558) Post relocation: addr: 0x0000000018104800 memsz: 0x000000000117fbe0 filesz: 0x0000000000015a3d using LZMA [ 0x18104800, 18137d90, 0x192843e0) <- 00100038 Clearing Segment: addr: 0x0000000018137d90 memsz: 0x000000000114c650 dest 0000000018104800, end 00000000192843e0, bouncebuffer ffffffffffffffff Loaded segments BS: BS_PAYLOAD_LOAD times (us): entry 0 run 125150 exit 1 Jumping to boot code at 0000000018104800(00000000f7eda000) CPU0: stack: 00000000ff8ec000 - 00000000ff8f0000, lowest used address 00000000ff8ef3d0, stack used: 3120 bytes CBFS: 'VBOOT' located CBFS at [402000:44cc00) CBFS: Locating 'fallback/bl31' CBFS: Found @ offset 10ec0 size 8d0c Loading segment from ROM address 0x0000000000100000 code (compression=1) New segment dstaddr 0x10000 memsize 0x40000 srcaddr 0x100054 filesize 0x8192 Loading segment from ROM address 0x000000000010001c code (compression=1) New segment dstaddr 0xff8d4000 memsize 0x1f50 srcaddr 0x1081e6 filesize 0xb26 Loading segment from ROM address 0x0000000000100038 Entry Point 0x0000000000010000 Loading Segment: addr: 0x0000000000010000 memsz: 0x0000000000040000 filesz: 0x0000000000008192 lb: [0x0000000000300000, 0x0000000000320558) Post relocation: addr: 0x0000000000010000 memsz: 0x0000000000040000 filesz: 0x0000000000008192 using LZMA [ 0x00010000, 00035708, 0x00050000) <- 00100054 Clearing Segment: addr: 0x0000000000035708 memsz: 0x000000000001a8f8 dest 0000000000010000, end 0000000000050000, bouncebuffer ffffffffffffffff Loading Segment: addr: 0x00000000ff8d4000 memsz: 0x0000000000001f50 filesz: 0x0000000000000b26 lb: [0x0000000000300000, 0x0000000000320558) Post relocation: addr: 0x00000000ff8d4000 memsz: 0x0000000000001f50 filesz: 0x0000000000000b26 using LZMA [ 0xff8d4000, ff8d5f50, 0xff8d5f50) <- 001081e6 dest 00000000ff8d4000, end 00000000ff8d5f50, bouncebuffer ffffffffffffffff Loaded segments INFO: plat_rockchip_pmusram_prepare pmu: code d2bfe625,d2bfe625,80 INFO: plat_rockchip_pmusram_prepare pmu: code 0xff8d4000,0x50000,3364 INFO: plat_rockchip_pmusram_prepare: data 0xff8d4d28,0xff8d4d24,4648 NOTICE: BL31: v1.2(debug): NOTICE: BL31: Built : Sun Sep 4 22:36:16 UTC 2016 INFO: GICv3 with legacy support detected. ARM GICV3 driver initialized in EL3 INFO: plat_rockchip_pmu_init(1189): pd status 3e INFO: BL31: Initializing runtime services INFO: BL31: Preparing for EL3 exit to normal world INFO: Entry point address = 0x18104800 INFO: SPSR = 0x8
Change-Id: Ie2484d122a603f1c7b7082a1de3f240aa6e6d540 Signed-off-by: Patrick Georgi pgeorgi@chromium.org Original-Commit-Id: 8c1d75bff6e810a39776048ad9049ec0a9c5d94e Original-Change-Id: I2d60e5762f8377e43835558f76a3928156acb26c Original-Signed-off-by: Simon Glass sjg@chromium.org Original-Reviewed-on: https://chromium-review.googlesource.com/376849 Original-Commit-Ready: Simon Glass sjg@google.com Original-Tested-by: Simon Glass sjg@google.com Original-Reviewed-by: Julius Werner jwerner@chromium.org --- src/arch/arm64/Makefile.inc | 2 +- src/arch/arm64/arm_tf.c | 5 ++--- src/include/program_loading.h | 10 ++++++++-- src/lib/prog_loaders.c | 2 +- src/lib/selfboot.c | 24 ++++++++++++++---------- 5 files changed, 26 insertions(+), 17 deletions(-)
diff --git a/src/arch/arm64/Makefile.inc b/src/arch/arm64/Makefile.inc index ece35a6..6e3f080 100644 --- a/src/arch/arm64/Makefile.inc +++ b/src/arch/arm64/Makefile.inc @@ -178,7 +178,7 @@ $(BL31): $(obj)/build.h
BL31_CBFS := $(CONFIG_CBFS_PREFIX)/bl31 $(BL31_CBFS)-file := $(BL31) -$(BL31_CBFS)-type := stage +$(BL31_CBFS)-type := payload $(BL31_CBFS)-compression := $(CBFS_COMPRESS_FLAG) cbfs-files-y += $(BL31_CBFS)
diff --git a/src/arch/arm64/arm_tf.c b/src/arch/arm64/arm_tf.c index 1ec87c4..e976e34 100644 --- a/src/arch/arm64/arm_tf.c +++ b/src/arch/arm64/arm_tf.c @@ -50,11 +50,10 @@ void arm_tf_run_bl31(u64 payload_entry, u64 payload_arg0, u64 payload_spsr) if (prog_locate(&bl31)) die("BL31 not found");
- if (cbfs_prog_stage_load(&bl31)) + bl31_entry = selfload(&bl31, false); + if (!bl31_entry) die("BL31 load failed");
- bl31_entry = prog_entry(&bl31); - SET_PARAM_HEAD(&bl31_params, PARAM_BL31, VERSION_1, 0);
if (IS_ENABLED(CONFIG_ARM64_USE_SECURE_OS)) { diff --git a/src/include/program_loading.h b/src/include/program_loading.h index e265b18..3958fda 100644 --- a/src/include/program_loading.h +++ b/src/include/program_loading.h @@ -189,7 +189,13 @@ void payload_run(void); /* Mirror the payload to be loaded. */ void mirror_payload(struct prog *payload);
-/* Defined in src/lib/selfboot.c */ -void *selfload(struct prog *payload); +/* + * Set check_regions to true to check that the payload targets usable memory. + * With this flag set, if it does not, the load will fail and this function + * will return NULL. + * + * Defined in src/lib/selfboot.c + */ +void *selfload(struct prog *payload, bool check_regions);
#endif /* PROGRAM_LOADING_H */ diff --git a/src/lib/prog_loaders.c b/src/lib/prog_loaders.c index ecbc679..c0dcd60 100644 --- a/src/lib/prog_loaders.c +++ b/src/lib/prog_loaders.c @@ -161,7 +161,7 @@ void payload_load(void) mirror_payload(payload);
/* Pass cbtables to payload if architecture desires it. */ - prog_set_entry(payload, selfload(payload), + prog_set_entry(payload, selfload(payload, true), cbmem_find(CBMEM_ID_CBTABLE));
out: diff --git a/src/lib/selfboot.c b/src/lib/selfboot.c index 1ce7f94..162a034 100644 --- a/src/lib/selfboot.c +++ b/src/lib/selfboot.c @@ -88,7 +88,8 @@ static void get_bounce_buffer(unsigned long req_size) /* When the ramstage is relocatable there is no need for a bounce * buffer. All payloads should not overlap the ramstage. */ - if (IS_ENABLED(CONFIG_RELOCATABLE_RAMSTAGE)) { + if (IS_ENABLED(CONFIG_RELOCATABLE_RAMSTAGE) || + !arch_supports_bounce_buffer()) { bounce_buffer = ~0UL; bounce_size = 0; return; @@ -357,15 +358,16 @@ static int payload_targets_usable_ram(struct segment *head) return 1; }
-static int load_self_segments( - struct segment *head, - struct prog *payload) +static int load_self_segments(struct segment *head, struct prog *payload, + bool check_regions) { struct segment *ptr; unsigned long bounce_high = lb_end;
- if (!payload_targets_usable_ram(head)) - return 0; + if (check_regions) { + if (!payload_targets_usable_ram(head)) + return 0; + }
for(ptr = head->next; ptr != head; ptr = ptr->next) { /* @@ -373,8 +375,10 @@ static int load_self_segments( * allocated so that there aren't conflicts with the actual * payload. */ - bootmem_add_range(ptr->s_dstaddr, ptr->s_memsz, - LB_MEM_UNUSABLE); + if (check_regions) { + bootmem_add_range(ptr->s_dstaddr, ptr->s_memsz, + LB_MEM_UNUSABLE); + }
if (!overlaps_coreboot(ptr)) continue; @@ -486,7 +490,7 @@ static int load_self_segments( return 1; }
-void *selfload(struct prog *payload) +void *selfload(struct prog *payload, bool check_regions) { uintptr_t entry = 0; struct segment head; @@ -502,7 +506,7 @@ void *selfload(struct prog *payload) goto out;
/* Load the segments */ - if (!load_self_segments(&head, payload)) + if (!load_self_segments(&head, payload, check_regions)) goto out;
printk(BIOS_SPEW, "Loaded segments\n");