Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/39685 )
Change subject: Documentation: Use correct KiB/MiB units instead of KB/MB ......................................................................
Documentation: Use correct KiB/MiB units instead of KB/MB
Fix a common mistake of using KB/MB where KiB/MiB is what actually is meant.
1 MB = (10^3)^2 = 1000000 1 MiB = (2^10)^2 = 1048576
Change-Id: I78327652b6c6526318071a9d4bafd7ec279ea614 Signed-off-by: Evgeny Zinoviev me@ch1p.io Reviewed-on: https://review.coreboot.org/c/coreboot/+/39685 Reviewed-by: Angel Pons th3fanbus@gmail.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M Documentation/ifdtool/layout.md M Documentation/mainboard/facebook/monolith.md M Documentation/mainboard/hp/8760w.md M Documentation/mainboard/intel/kblrvp11.md M Documentation/mainboard/lenovo/montevina_series.md M Documentation/mainboard/lenovo/t440p.md M Documentation/mainboard/msi/ms7707/ms7707.md M Documentation/mainboard/supermicro/x11-lga1151-series/x11-lga1151-series.md 8 files changed, 21 insertions(+), 21 deletions(-)
Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved
diff --git a/Documentation/ifdtool/layout.md b/Documentation/ifdtool/layout.md index 2513929..77319b8 100644 --- a/Documentation/ifdtool/layout.md +++ b/Documentation/ifdtool/layout.md @@ -19,7 +19,7 @@ | IFD Region | IFD Region name | FMAP Name | Notes | | index | | | | +============+==================+===========+===========================================+ -| 0 | Flash Descriptor | SI_DESC | Always the top 4KB of flash | +| 0 | Flash Descriptor | SI_DESC | Always the top 4 KiB of flash | +------------+------------------+-----------+-------------------------------------------+ | 1 | BIOS | SI_BIOS | This is the region that contains coreboot | +------------+------------------+-----------+-------------------------------------------+ @@ -40,9 +40,9 @@ The ifdtool can be used to manipulate a firmware image with a IFD. This tool will not take into account the FMAP while modifying the image which can lead to unexpected and hard to debug issues with the firmware image. For example if the -ME region is defined at 6 MB in the IFD but the FMAP only allocates 4 MB for the -ME, then when the ME is added by the ifdtool 6 MB will be written which could -overwrite 2 MB of the BIOS. +ME region is defined at 6 MiB in the IFD but the FMAP only allocates 4 MiB for +the ME, then when the ME is added by the ifdtool 6 MiB will be written which +could overwrite 2 MiB of the BIOS.
In order to validate that the FMAP and the IFD are compatible the ifdtool provides --validate (-t) option. `ifdtool -t` will read both the IFD and the @@ -75,4 +75,4 @@ FMAP area SI_PDR: offset: 0x007fc000 length: 0x00004000 -``` \ No newline at end of file +``` diff --git a/Documentation/mainboard/facebook/monolith.md b/Documentation/mainboard/facebook/monolith.md index 022a4e5..0ed692c 100644 --- a/Documentation/mainboard/facebook/monolith.md +++ b/Documentation/mainboard/facebook/monolith.md @@ -41,8 +41,8 @@ 00003000:006FFFFF me 00001000:00002fff gbe ``` -3) Use `ifdtool -n <layout_file> <flash_image>` to resize the *bios* region from the default 6MB - to 9 MB, this is required to create sufficient space for LinuxBoot. +3) Use `ifdtool -n <layout_file> <flash_image>` to resize the *bios* region from the default 6 MiB + to 9 MiB, this is required to create sufficient space for LinuxBoot. NOTE: Please make sure only the firmware descriptor (*fd*) region is changed. Older versions of the ifdtool corrupt the *me* region. 4) Use `ifdtool -x <resized_flash_image>` to extract the components. diff --git a/Documentation/mainboard/hp/8760w.md b/Documentation/mainboard/hp/8760w.md index 071d35e..857a1d9 100644 --- a/Documentation/mainboard/hp/8760w.md +++ b/Documentation/mainboard/hp/8760w.md @@ -36,7 +36,7 @@
## Flashing instructions
-HP EliteBook 8760w has an 8MB SOIC-8 flash chip on the bottom of the +HP EliteBook 8760w has an 8 MiB SOIC-8 flash chip on the bottom of the mainboard. You just need to remove the service cover, and use an SOIC-8 clip to read and flash the chip.
diff --git a/Documentation/mainboard/intel/kblrvp11.md b/Documentation/mainboard/intel/kblrvp11.md index 4ccb392..d536bea 100644 --- a/Documentation/mainboard/intel/kblrvp11.md +++ b/Documentation/mainboard/intel/kblrvp11.md @@ -60,7 +60,7 @@ 2. Make sure power supply is disconnected from board. 3. Connect Dediprog SF600 to header at J7H1. 4. Ensure that "currently working on" is in "application memory chip 1" -5. Go to "file" and select the .rom file (16 MB) to program chip1. +5. Go to "file" and select the .rom file (16 MiB) to program chip1. 6. Execute the batch operation to erase and program the chip.
## Technology diff --git a/Documentation/mainboard/lenovo/montevina_series.md b/Documentation/mainboard/lenovo/montevina_series.md index b513c97..f3aca04 100644 --- a/Documentation/mainboard/lenovo/montevina_series.md +++ b/Documentation/mainboard/lenovo/montevina_series.md @@ -53,7 +53,7 @@
```eval_rst +---------------------------+---------------------------+---------------------------+ -| 4 MB chip | 8 MB chip | 16 MB chip | +| 4 MiB chip | 8 MiB chip | 16 MiB chip | +===========================+===========================+===========================+ | .. code-block:: none | .. code-block:: none | .. code-block:: none | | | | | @@ -97,12 +97,12 @@ $ make ```
-If your flash is not 8 MB, you need to change values of `flcomp_density1` and +If your flash is not 8 MiB, you need to change values of `flcomp_density1` and `flreg1_limit` in the `ifd-x200.set` file according to following table:
```eval_rst +-----------------+-------+-------+--------+ -| | 4 MB | 8 MB | 16 MB | +| | 4 MiB | 8 MiB | 16 MiB | +=================+=======+=======+========+ | flcomp_density1 | 0x3 | 0x4 | 0x5 | +-----------------+-------+-------+--------+ @@ -123,7 +123,7 @@ ``` Mainboard ---> ROM chip size (8192 KB (8 MB)) # According to your chip - (0x7fd000) Size of CBFS filesystem in ROM # or 0x3fd000 for 4 MB chip / 0x1ffd000 for 16 MB chip + (0x7fd000) Size of CBFS filesystem in ROM # or 0x3fd000 for 4 MiB chip / 0x1ffd000 for 16 MiB chip
Chipset ---> [*] Add Intel descriptor.bin file @@ -142,7 +142,7 @@
```eval_rst +---------------------------------+---------------------------------+ -| 4 MB chip | 8 MB chip | +| 4 MiB chip | 8 MiB chip | +=================================+=================================+ | .. code-block:: none | .. code-block:: none | | | | @@ -159,6 +159,6 @@ On each boot of vendor BIOS `ec` area in flash is checked for having firmware there, and if there is one, it proceedes to update firmware on H8S/2116 (when both external power and main battery are attached). Once update is performed, -first 64 KB of `ec` area is erased. Visit +first 64 KiB of `ec` area is erased. Visit [thinkpad-ec repository](https://github.com/hamishcoleman/thinkpad-ec) to learn more about how to extract EC firmware from vendor updates. diff --git a/Documentation/mainboard/lenovo/t440p.md b/Documentation/mainboard/lenovo/t440p.md index f364f07..f939fdd 100644 --- a/Documentation/mainboard/lenovo/t440p.md +++ b/Documentation/mainboard/lenovo/t440p.md @@ -8,15 +8,15 @@
## Flashing instructions
-T440p has two flash chips, an 8MB W25Q64FV and a 4MB W25Q32FV. To flash +T440p has two flash chips, an 8 MiB W25Q64FV and a 4 MiB W25Q32FV. To flash coreboot, you just need to remove the big door according to the T440 -[Hardware Maintenance Manual] and flash the 4MB chip. +[Hardware Maintenance Manual] and flash the 4 MiB chip.
-To access the 8MB chip, you need to remove the base cover. +To access the 8 MiB chip, you need to remove the base cover.
- +
The flash layout of the OEM firmware is as follows:
diff --git a/Documentation/mainboard/msi/ms7707/ms7707.md b/Documentation/mainboard/msi/ms7707/ms7707.md index c27ff60..83b860c 100644 --- a/Documentation/mainboard/msi/ms7707/ms7707.md +++ b/Documentation/mainboard/msi/ms7707/ms7707.md @@ -2,7 +2,7 @@
* MSI MS-7707 V1.1 (Medion OEM Akoya P4385D MSN10014555) * SandyBridge Intel P67 (BD82x6x) -* Winbond 25Q32BV (4MB) +* Winbond 25Q32BV (4 MiB) * Fintek F71808A SuperIO * Intel 82579V Gigabit * NEC uPD720200 USB 3.0 Host Controller diff --git a/Documentation/mainboard/supermicro/x11-lga1151-series/x11-lga1151-series.md b/Documentation/mainboard/supermicro/x11-lga1151-series/x11-lga1151-series.md index 03bebad..495ae09 100644 --- a/Documentation/mainboard/supermicro/x11-lga1151-series/x11-lga1151-series.md +++ b/Documentation/mainboard/supermicro/x11-lga1151-series/x11-lga1151-series.md @@ -18,7 +18,7 @@ ## De-blobbing
- [Intel FSP2.0] can not be removed as long as there is no free replacement -- Intel ME can be cleaned using me_cleaner (~4.5 MB more free space) +- Intel ME can be cleaned using me_cleaner (~4.5 MiB more free space) - Intel Ethernet Controller Firmware can be removed when it's extended functionality is not needed. For more details refer to the respective datasheet (e.g 333016-008 for I210). - Boards with [AST2400] BMC/IPMI: Firmware can be replaced by [OpenBMC]