[coreboot-gerrit] Change in coreboot[master]: soc/intel/icelake: Fix 16-bit read/write PCI_COMMAND register

[HAOUAS Elyes (Code Review)]

Hello build bot (Jenkins), Patrick Rudolph,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/40841

to look at the new patch set (#2).

Change subject: soc/intel/icelake: Fix 16-bit read/write PCI_COMMAND register
......................................................................

soc/intel/icelake: Fix 16-bit read/write PCI_COMMAND register

Change-Id: Ibe9752a3f09e8944f7fbcf385b83faae95a7cd9b
Signed-off-by: Elyes HAOUAS 
---
M src/soc/intel/icelake/bootblock/pch.c
M src/soc/intel/icelake/graphics.c
2 files changed, 7 insertions(+), 9 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/41/40841/2